Lines Matching +full:0 +full:x65c
28 #clock-cells = <0>;
34 #clock-cells = <0>;
41 #size-cells = <0>;
43 cpu0: cpu@0 {
47 reg = <0>;
110 memory@0 {
112 reg = <0x0 0x0>;
161 mboxes = <&apcs 0>;
213 reg = <0x3000000 0x100000>;
218 reg = <0x08000000 0x5100000>;
224 reg = <0x0d100000 0x100000>;
230 reg = <0x0dc00000 0x1900000>;
253 qcom,local-pid = <0>;
278 qcom,local-pid = <0>;
297 #size-cells = <0>;
299 mboxes = <0>, <&apcs 13>, <&apcs 9>, <&apcs 19>;
301 apps_smsm: apps@0 {
302 reg = <0>;
336 reg = <0xf9000000 0x1000>,
337 <0xf9002000 0x1000>;
345 reg = <0xf9011000 0x1000>;
349 #clock-cells = <0>;
354 reg = <0xf9016000 0x40>;
355 #clock-cells = <0>;
415 reg = <0xf9012000 0x1000>;
420 reg = <0xf9017000 0x1000>;
428 reg = <0xf9020000 0x1000>;
434 frame-number = <0>;
437 reg = <0xf9021000 0x1000>,
438 <0xf9022000 0x1000>;
444 reg = <0xf9023000 0x1000>;
451 reg = <0xf9024000 0x1000>;
458 reg = <0xf9025000 0x1000>;
465 reg = <0xf9026000 0x1000>;
472 reg = <0xf9027000 0x1000>;
479 reg = <0xf9028000 0x1000>;
486 reg = <0xf9088000 0x1000>, <0xf9008000 0x1000>;
491 reg = <0xf9089000 0x1000>;
496 reg = <0xf9098000 0x1000>, <0xf9008000 0x1000>;
501 reg = <0xf9099000 0x1000>;
506 reg = <0xf90a8000 0x1000>, <0xf9008000 0x1000>;
511 reg = <0xf90a9000 0x1000>;
516 reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>;
521 reg = <0xf90b9000 0x1000>;
526 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
536 pinctrl-0 = <&sdhc1_default_state>;
542 reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
552 pinctrl-0 = <&sdhc3_default_state>;
558 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
568 pinctrl-0 = <&sdhc2_default_state>;
574 reg = <0xf991d000 0x1000>;
583 reg = <0xf991e000 0x1000>;
594 reg = <0xf991f000 0x1000>;
603 reg = <0xf9920000 0x1000>;
612 reg = <0xf9923000 0x1000>;
617 pinctrl-0 = <&blsp1_i2c1_pins>;
619 #size-cells = <0>;
625 reg = <0xf9924000 0x1000>;
630 pinctrl-0 = <&blsp1_i2c2_pins>;
632 #size-cells = <0>;
638 reg = <0xf9925000 0x1000>;
643 pinctrl-0 = <&blsp1_i2c3_pins>;
645 #size-cells = <0>;
651 reg = <0xf9926000 0x1000>;
656 pinctrl-0 = <&blsp1_i2c4_pins>;
658 #size-cells = <0>;
664 reg = <0xf9927000 0x1000>;
669 pinctrl-0 = <&blsp1_i2c5_pins>;
671 #size-cells = <0>;
677 reg = <0xf9928000 0x1000>;
683 pinctrl-0 = <&blsp1_i2c6_pins>;
686 #size-cells = <0>;
692 reg = <0xf9a55000 0x200>,
693 <0xf9a55200 0x200>;
707 ahb-burst-config = <0>;
717 #phy-cells = <0>;
721 resets = <&gcc GCC_USB2A_PHY_BCR>, <&usb 0>;
723 qcom,init-seq = /bits/ 8 <0x0 0x44
724 0x1 0x68 0x2 0x24 0x3 0x13>;
731 reg = <0xf9bff000 0x200>;
738 reg = <0xfc190000 0x10000>;
743 reg = <0xfc400000 0x4000>;
756 reg = <0xfc428000 0x4000>;
760 ranges = <0 0xfc428000 0x4000>;
763 reg = <0x150 0x14>;
767 reg = <0xb50 0x14>;
771 reg = <0x1550 0x14>;
775 reg = <0x1f50 0x14>;
781 reg = <0xfc4a9000 0x1000>, /* TM */
782 <0xfc4a8000 0x1000>; /* SROT */
809 reg = <0xfc4ab000 0x4>;
814 reg = <0xfc4bc000 0x1000>;
819 reg = <0x1c1 0x2>;
824 reg = <0x1c2 0x2>;
829 reg = <0x1c4 0x1>;
830 bits = <0 6>;
834 reg = <0x1c4 0x2>;
839 reg = <0x1c5 0x2>;
844 reg = <0x1c6 0x1>;
849 reg = <0x1c7 0x1>;
850 bits = <0 6>;
854 reg = <0x1ca 0x2>;
859 reg = <0x1cc 0x1>;
860 bits = <0 8>;
864 reg = <0x1cd 0x1>;
865 bits = <0 6>;
869 reg = <0x1cd 0x2>;
874 reg = <0x1ce 0x2>;
879 reg = <0x1cf 0x1>;
884 reg = <0x446 0x2>;
889 reg = <0x447 0x1>;
894 reg = <0x44e 0x1>;
899 reg = <0x44f 0x1>;
907 reg = <0xfc4cf000 0x1000>,
908 <0xfc4cb000 0x1000>,
909 <0xfc4ca000 0x1000>;
912 qcom,ee = <0>;
913 qcom,channel = <0>;
915 #size-cells = <0>;
922 reg = <0xfc834000 0x7000>;
925 qcom,ee = <0>;
934 reg = <0xfc880000 0x4040>,
935 <0xfc820000 0x10000>;
940 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
965 qcom,ext-bhs-reg = <&tcsr_regs_1 0x194>;
966 qcom,halt-regs = <&tcsr_regs_1 0x180 0x200 0x280>;
968 qcom,smem-states = <&modem_smp2p_out 0>;
993 qcom,smd-edge = <0>;
1001 reg = <0xfd484000 0x1000>;
1007 reg = <0xfd485000 0x1000>;
1012 reg = <0xfd510000 0x4000>;
1015 gpio-ranges = <&tlmm 0 0 117>;
1132 reg = <0xfd8c0000 0x6000>;
1155 reg = <0xfd900000 0x100>, <0xfd924000 0x1000>;
1180 reg = <0xfd900100 0x22000>;
1184 interrupts = <0>;
1197 #size-cells = <0>;
1199 port@0 {
1200 reg = <0>;
1211 reg = <0xfd922800 0x1f8>;
1240 #size-cells = <0>;
1244 #size-cells = <0>;
1246 port@0 {
1247 reg = <0>;
1263 reg = <0xfd922a00 0xd4>,
1264 <0xfd922b00 0x280>,
1265 <0xfd922d80 0x30>;
1271 #phy-cells = <0>;
1282 reg = <0xfda0c000 0x1000>;
1284 #size-cells = <0>;
1294 pinctrl-0 = <&cci_default>;
1299 cci_i2c0: i2c-bus@0 {
1300 reg = <0>;
1303 #size-cells = <0>;
1309 reg = <0xfdb00000 0x10000>;
1349 reg = <0xfdd00000 0x2000>,
1350 <0xfec00000 0x20000>;
1352 ranges = <0 0xfec00000 0x20000>;
1359 gmu_sram: gmu-sram@0 {
1360 reg = <0x0 0x20000>;
1366 reg = <0xfe200000 0x100>;
1369 <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
1383 qcom,smem-states = <&adsp_smp2p_out 0>;
1400 reg = <0xfe805000 0x1000>;
1404 offset = <0x65c>;
1406 mode-bootloader = <0x77665500>;
1407 mode-normal = <0x77665501>;
1408 mode-recovery = <0x77665502>;