Lines Matching +full:regulator +full:- +full:fixed +full:- +full:domain
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mfd/qcom-rpm.h>
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
8 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
11 #include <dt-bindings/soc/qcom,gsbi.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
19 interrupt-parent = <&intc>;
22 #address-cells = <1>;
23 #size-cells = <0>;
27 enable-method = "qcom,kpss-acc-v1";
30 next-level-cache = <&l2>;
37 enable-method = "qcom,kpss-acc-v1";
40 next-level-cache = <&l2>;
45 l2: l2-cache {
47 cache-level = <2>;
48 cache-unified;
52 thermal-zones {
53 sensor0-thermal {
54 polling-delay-passive = <0>;
55 polling-delay = <0>;
56 thermal-sensors = <&tsens 0>;
59 cpu-critical {
65 cpu-hot {
73 sensor1-thermal {
74 polling-delay-passive = <0>;
75 polling-delay = <0>;
76 thermal-sensors = <&tsens 1>;
79 cpu-critical {
85 cpu-hot {
93 sensor2-thermal {
94 polling-delay-passive = <0>;
95 polling-delay = <0>;
96 thermal-sensors = <&tsens 2>;
99 cpu-critical {
105 cpu-hot {
113 sensor3-thermal {
114 polling-delay-passive = <0>;
115 polling-delay = <0>;
116 thermal-sensors = <&tsens 3>;
119 cpu-critical {
125 cpu-hot {
133 sensor4-thermal {
134 polling-delay-passive = <0>;
135 polling-delay = <0>;
136 thermal-sensors = <&tsens 4>;
139 cpu-critical {
145 cpu-hot {
153 sensor5-thermal {
154 polling-delay-passive = <0>;
155 polling-delay = <0>;
156 thermal-sensors = <&tsens 5>;
159 cpu-critical {
165 cpu-hot {
173 sensor6-thermal {
174 polling-delay-passive = <0>;
175 polling-delay = <0>;
176 thermal-sensors = <&tsens 6>;
179 cpu-critical {
185 cpu-hot {
193 sensor7-thermal {
194 polling-delay-passive = <0>;
195 polling-delay = <0>;
196 thermal-sensors = <&tsens 7>;
199 cpu-critical {
205 cpu-hot {
213 sensor8-thermal {
214 polling-delay-passive = <0>;
215 polling-delay = <0>;
216 thermal-sensors = <&tsens 8>;
219 cpu-critical {
225 cpu-hot {
233 sensor9-thermal {
234 polling-delay-passive = <0>;
235 polling-delay = <0>;
236 thermal-sensors = <&tsens 9>;
239 cpu-critical {
245 cpu-hot {
253 sensor10-thermal {
254 polling-delay-passive = <0>;
255 polling-delay = <0>;
256 thermal-sensors = <&tsens 10>;
259 cpu-critical {
265 cpu-hot {
279 cpu-pmu {
280 compatible = "qcom,krait-pmu";
285 reserved-memory {
286 #address-cells = <1>;
287 #size-cells = <1>;
292 no-map;
298 no-map;
306 compatible = "fixed-clock";
307 #clock-cells = <0>;
308 clock-frequency = <25000000>;
312 compatible = "fixed-clock";
313 #clock-cells = <0>;
314 clock-frequency = <25000000>;
318 compatible = "fixed-clock";
319 clock-frequency = <32768>;
320 #clock-cells = <0>;
326 compatible = "qcom,scm-ipq806x", "qcom,scm";
330 stmmac_axi_setup: stmmac-axi-config {
336 vsdcc_fixed: vsdcc-regulator {
337 compatible = "regulator-fixed";
338 regulator-name = "SDCC Power";
339 regulator-min-microvolt = <3300000>;
340 regulator-max-microvolt = <3300000>;
341 regulator-always-on;
345 #address-cells = <1>;
346 #size-cells = <1>;
348 compatible = "simple-bus";
351 compatible = "qcom,rpm-ipq8064";
358 interrupt-names = "ack", "err", "wakeup";
361 clock-names = "ram";
363 rpmcc: clock-controller {
364 compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
365 #clock-cells = <1>;
372 qcom,controller-type = "pmic-arbiter";
376 compatible = "qcom,ipq8064-qfprom", "qcom,qfprom";
378 #address-cells = <1>;
379 #size-cells = <1>;
386 tsens_calib_backup: calib-backup@410 {
392 compatible = "qcom,ipq8064-pinctrl";
395 gpio-controller;
396 gpio-ranges = <&qcom_pinmux 0 0 69>;
397 #gpio-cells = <2>;
398 interrupt-controller;
399 #interrupt-cells = <2>;
402 pcie0_pins: pcie0-state {
405 drive-strength = <12>;
406 bias-disable;
409 pcie1_pins: pcie1-state {
412 drive-strength = <12>;
413 bias-disable;
416 pcie2_pins: pcie2-state {
419 drive-strength = <12>;
420 bias-disable;
423 i2c4_pins: i2c4-state {
426 drive-strength = <12>;
427 bias-disable;
430 spi_pins: spi-state {
433 drive-strength = <10>;
434 bias-disable;
437 leds_pins: leds-state {
441 drive-strength = <2>;
442 bias-pull-down;
443 output-low;
446 buttons_pins: buttons-state {
448 drive-strength = <2>;
449 bias-pull-up;
452 nand_pins: nand-state {
453 nand-pins {
460 drive-strength = <10>;
461 bias-disable;
464 nand-pullup-pins {
467 drive-strength = <10>;
468 bias-pull-up;
471 nand-hold-pins {
476 drive-strength = <10>;
477 bias-bus-hold;
481 mdio0_pins: mdio0-state {
484 drive-strength = <8>;
485 bias-disable;
488 rgmii2_pins: rgmii2-state {
494 drive-strength = <8>;
495 bias-disable;
499 gcc: clock-controller@900000 {
500 compatible = "qcom,gcc-ipq8064", "syscon";
502 clock-names = "pxo", "cxo", "pll4";
504 #clock-cells = <1>;
505 #reset-cells = <1>;
507 tsens: thermal-sensor {
508 compatible = "qcom,ipq8064-tsens";
510 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
511 nvmem-cell-names = "calib", "calib_backup";
513 interrupt-names = "uplow";
516 #thermal-sensor-cells = <1>;
521 compatible = "qcom,sfpb-mutex";
524 #hwlock-cells = <1>;
527 intc: interrupt-controller@2000000 {
528 compatible = "qcom,msm-qgic2";
529 interrupt-controller;
530 #interrupt-cells = <3>;
536 compatible = "qcom,kpss-wdt-ipq8064", "qcom,kpss-timer",
537 "qcom,msm-timer";
549 clock-frequency = <25000000>;
551 clock-names = "sleep";
552 cpu-offset = <0x80000>;
555 l2cc: clock-controller@2011000 {
556 compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc", "syscon";
559 clock-names = "pll8_vote", "pxo";
560 #clock-cells = <0>;
563 acc0: clock-controller@2088000 {
564 compatible = "qcom,kpss-acc-v1";
567 clock-names = "pll8_vote", "pxo";
568 clock-output-names = "acpu0_aux";
569 #clock-cells = <0>;
572 saw0: power-manager@2089000 {
573 compatible = "qcom,ipq8064-saw2-cpu", "qcom,saw2";
577 acc1: clock-controller@2098000 {
578 compatible = "qcom,kpss-acc-v1";
581 clock-names = "pll8_vote", "pxo";
582 clock-output-names = "acpu1_aux";
583 #clock-cells = <0>;
586 saw1: power-manager@2099000 {
587 compatible = "qcom,ipq8064-saw2-cpu", "qcom,saw2";
597 compatible = "qcom,ipq8064-dwc3", "qcom,dwc3";
598 #address-cells = <1>;
599 #size-cells = <1>;
602 clock-names = "core";
615 phy-names = "usb2-phy", "usb3-phy";
622 compatible = "qcom,ipq806x-usb-phy-hs";
625 clock-names = "ref";
626 #phy-cells = <0>;
632 compatible = "qcom,ipq806x-usb-phy-ss";
635 clock-names = "ref";
636 #phy-cells = <0>;
642 compatible = "qcom,ipq8064-dwc3", "qcom,dwc3";
643 #address-cells = <1>;
644 #size-cells = <1>;
647 clock-names = "core";
660 phy-names = "usb2-phy", "usb3-phy";
667 compatible = "qcom,ipq806x-usb-phy-hs";
670 clock-names = "ref";
671 #phy-cells = <0>;
677 compatible = "qcom,ipq806x-usb-phy-ss";
680 clock-names = "ref";
681 #phy-cells = <0>;
686 sdcc3bam: dma-controller@12182000 {
687 compatible = "qcom,bam-v1.3.0";
691 clock-names = "bam_clk";
692 #dma-cells = <1>;
696 sdcc1bam: dma-controller@12402000 {
697 compatible = "qcom,bam-v1.3.0";
701 clock-names = "bam_clk";
702 #dma-cells = <1>;
707 compatible = "simple-bus";
708 #address-cells = <1>;
709 #size-cells = <1>;
714 arm,primecell-periphid = <0x00051180>;
719 clock-names = "mclk", "apb_pclk";
720 bus-width = <8>;
721 cap-sd-highspeed;
722 cap-mmc-highspeed;
723 max-frequency = <192000000>;
724 sd-uhs-sdr104;
725 sd-uhs-ddr50;
726 vqmmc-supply = <&vsdcc_fixed>;
728 dma-names = "tx", "rx";
734 arm,primecell-periphid = <0x00051180>;
738 clock-names = "mclk", "apb_pclk";
739 bus-width = <8>;
740 max-frequency = <96000000>;
741 non-removable;
742 cap-sd-highspeed;
743 cap-mmc-highspeed;
744 vmmc-supply = <&vsdcc_fixed>;
746 dma-names = "tx", "rx";
751 compatible = "qcom,gsbi-v1.0.0";
753 cell-index = <1>;
755 clock-names = "iface";
756 #address-cells = <1>;
757 #size-cells = <1>;
760 syscon-tcsr = <&tcsr>;
765 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
770 clock-names = "core", "iface";
776 compatible = "qcom,i2c-qup-v1.1.1";
780 clock-names = "core", "iface";
781 #address-cells = <1>;
782 #size-cells = <0>;
789 compatible = "qcom,gsbi-v1.0.0";
790 cell-index = <2>;
793 clock-names = "iface";
794 #address-cells = <1>;
795 #size-cells = <1>;
799 syscon-tcsr = <&tcsr>;
802 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
807 clock-names = "core", "iface";
812 compatible = "qcom,i2c-qup-v1.1.1";
817 clock-names = "core", "iface";
820 #address-cells = <1>;
821 #size-cells = <0>;
826 compatible = "qcom,gsbi-v1.0.0";
827 cell-index = <4>;
830 clock-names = "iface";
831 #address-cells = <1>;
832 #size-cells = <1>;
836 syscon-tcsr = <&tcsr>;
839 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
844 clock-names = "core", "iface";
849 compatible = "qcom,i2c-qup-v1.1.1";
854 clock-names = "core", "iface";
857 #address-cells = <1>;
858 #size-cells = <0>;
863 compatible = "qcom,gsbi-v1.0.0";
865 cell-index = <6>;
867 clock-names = "iface";
868 #address-cells = <1>;
869 #size-cells = <1>;
872 syscon-tcsr = <&tcsr>;
877 compatible = "qcom,i2c-qup-v1.1.1";
882 clock-names = "core", "iface";
884 #address-cells = <1>;
885 #size-cells = <0>;
891 compatible = "qcom,spi-qup-v1.1.1";
896 clock-names = "core", "iface";
898 #address-cells = <1>;
899 #size-cells = <0>;
907 compatible = "qcom,gsbi-v1.0.0";
908 cell-index = <7>;
911 clock-names = "iface";
912 #address-cells = <1>;
913 #size-cells = <1>;
915 syscon-tcsr = <&tcsr>;
918 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
923 clock-names = "core", "iface";
928 compatible = "qcom,i2c-qup-v1.1.1";
933 clock-names = "core", "iface";
935 #address-cells = <1>;
936 #size-cells = <0>;
942 adm_dma: dma-controller@18300000 {
946 #dma-cells = <1>;
949 clock-names = "core", "iface";
956 reset-names = "clk", "pbus", "c0", "c1", "c2";
963 compatible = "qcom,gsbi-v1.0.0";
964 cell-index = <5>;
967 clock-names = "iface";
968 #address-cells = <1>;
970 #size-cells = <1>;
974 syscon-tcsr = <&tcsr>;
977 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
982 clock-names = "core", "iface";
987 compatible = "qcom,i2c-qup-v1.1.1";
992 clock-names = "core", "iface";
995 #address-cells = <1>;
996 #size-cells = <0>;
1000 compatible = "qcom,spi-qup-v1.1.1";
1005 clock-names = "core", "iface";
1008 #address-cells = <1>;
1009 #size-cells = <0>;
1014 compatible = "qcom,tcsr-ipq8064", "syscon";
1022 clock-names = "core";
1025 nand: nand-controller@1ac00000 {
1026 compatible = "qcom,ipq806x-nand";
1029 pinctrl-0 = <&nand_pins>;
1030 pinctrl-names = "default";
1034 clock-names = "core", "aon";
1037 dma-names = "rxtx";
1038 qcom,cmd-crci = <15>;
1039 qcom,data-crci = <3>;
1041 #address-cells = <1>;
1042 #size-cells = <0>;
1047 sata_phy: sata-phy@1b400000 {
1048 compatible = "qcom,ipq806x-sata-phy";
1052 clock-names = "cfg";
1054 #phy-cells = <0>;
1059 compatible = "qcom,pcie-ipq8064";
1064 reg-names = "dbi", "elbi", "parf", "config";
1066 linux,pci-domain = <0>;
1067 bus-range = <0x00 0xff>;
1068 num-lanes = <1>;
1069 #address-cells = <3>;
1070 #size-cells = <2>;
1076 interrupt-names = "msi";
1077 #interrupt-cells = <1>;
1078 interrupt-map-mask = <0 0 0 0x7>;
1079 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1089 clock-names = "core", "iface", "phy", "aux", "ref";
1091 assigned-clocks = <&gcc PCIE_ALT_REF_CLK>;
1092 assigned-clock-rates = <100000000>;
1100 reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
1102 pinctrl-0 = <&pcie0_pins>;
1103 pinctrl-names = "default";
1106 perst-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
1111 bus-range = <0x01 0xff>;
1113 #address-cells = <3>;
1114 #size-cells = <2>;
1120 compatible = "qcom,pcie-ipq8064";
1125 reg-names = "dbi", "elbi", "parf", "config";
1127 linux,pci-domain = <1>;
1128 bus-range = <0x00 0xff>;
1129 num-lanes = <1>;
1130 #address-cells = <3>;
1131 #size-cells = <2>;
1137 interrupt-names = "msi";
1138 #interrupt-cells = <1>;
1139 interrupt-map-mask = <0 0 0 0x7>;
1140 interrupt-map = <0 0 0 1 &intc 0 58 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1150 clock-names = "core", "iface", "phy", "aux", "ref";
1152 assigned-clocks = <&gcc PCIE_1_ALT_REF_CLK>;
1153 assigned-clock-rates = <100000000>;
1161 reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
1163 pinctrl-0 = <&pcie1_pins>;
1164 pinctrl-names = "default";
1167 perst-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
1172 bus-range = <0x01 0xff>;
1174 #address-cells = <3>;
1175 #size-cells = <2>;
1181 compatible = "qcom,pcie-ipq8064";
1186 reg-names = "dbi", "elbi", "parf", "config";
1188 linux,pci-domain = <2>;
1189 bus-range = <0x00 0xff>;
1190 num-lanes = <1>;
1191 #address-cells = <3>;
1192 #size-cells = <2>;
1198 interrupt-names = "msi";
1199 #interrupt-cells = <1>;
1200 interrupt-map-mask = <0 0 0 0x7>;
1201 interrupt-map = <0 0 0 1 &intc 0 72 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1211 clock-names = "core", "iface", "phy", "aux", "ref";
1213 assigned-clocks = <&gcc PCIE_2_ALT_REF_CLK>;
1214 assigned-clock-rates = <100000000>;
1222 reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
1224 pinctrl-0 = <&pcie2_pins>;
1225 pinctrl-names = "default";
1228 perst-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_LOW>;
1233 bus-range = <0x01 0xff>;
1235 #address-cells = <3>;
1236 #size-cells = <2>;
1246 lcc: clock-controller@28000000 {
1247 compatible = "qcom,lcc-ipq8064";
1249 #clock-cells = <1>;
1250 #reset-cells = <1>;
1254 compatible = "qcom,lpass-cpu";
1259 clock-names = "ahbix-clk",
1260 "mi2s-osr-clk",
1261 "mi2s-bit-clk";
1263 interrupt-names = "lpass-irq-lpaif";
1265 reg-names = "lpass-lpaif";
1269 compatible = "qcom,ipq806x-ahci", "generic-ahci";
1279 clock-names = "slave_iface", "iface", "core",
1282 assigned-clocks = <&gcc SATA_RXOOB_CLK>, <&gcc SATA_PMALIVE_CLK>;
1283 assigned-clock-rates = <100000000>, <100000000>;
1286 phy-names = "sata-phy";
1292 compatible = "qcom,ipq806x-gmac", "snps,dwmac";
1295 interrupt-names = "macirq";
1297 snps,axi-config = <&stmmac_axi_setup>;
1301 qcom,nss-common = <&nss_common>;
1302 qcom,qsgmii-csr = <&qsgmii_csr>;
1305 clock-names = "stmmaceth";
1309 reset-names = "stmmaceth", "ahb";
1316 compatible = "qcom,ipq806x-gmac", "snps,dwmac";
1319 interrupt-names = "macirq";
1321 snps,axi-config = <&stmmac_axi_setup>;
1325 qcom,nss-common = <&nss_common>;
1326 qcom,qsgmii-csr = <&qsgmii_csr>;
1329 clock-names = "stmmaceth";
1333 reset-names = "stmmaceth", "ahb";
1340 compatible = "qcom,ipq806x-gmac", "snps,dwmac";
1343 interrupt-names = "macirq";
1345 snps,axi-config = <&stmmac_axi_setup>;
1349 qcom,nss-common = <&nss_common>;
1350 qcom,qsgmii-csr = <&qsgmii_csr>;
1353 clock-names = "stmmaceth";
1357 reset-names = "stmmaceth", "ahb";
1364 compatible = "qcom,ipq806x-gmac", "snps,dwmac";
1367 interrupt-names = "macirq";
1369 snps,axi-config = <&stmmac_axi_setup>;
1373 qcom,nss-common = <&nss_common>;
1374 qcom,qsgmii-csr = <&qsgmii_csr>;
1377 clock-names = "stmmaceth";
1381 reset-names = "stmmaceth", "ahb";