Lines Matching refs:mmcc
7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
727 mmcc: clock-controller@4000000 { label
728 compatible = "qcom,mmcc-apq8064";
1006 <&mmcc GFX3D_CLK>,
1007 <&mmcc GFX3D_AHB_CLK>,
1008 <&mmcc GFX3D_AXI_CLK>,
1009 <&mmcc MMSS_IMEM_AHB_CLK>;
1105 clocks = <&mmcc DSI_M_AHB_CLK>,
1106 <&mmcc DSI_S_AHB_CLK>,
1107 <&mmcc AMP_AHB_CLK>,
1108 <&mmcc DSI_CLK>,
1109 <&mmcc DSI1_BYTE_CLK>,
1110 <&mmcc DSI_PIXEL_CLK>,
1111 <&mmcc DSI1_ESC_CLK>;
1116 assigned-clocks = <&mmcc DSI1_BYTE_SRC>,
1117 <&mmcc DSI1_ESC_SRC>,
1118 <&mmcc DSI_SRC>,
1119 <&mmcc DSI_PIXEL_SRC>;
1157 clocks = <&mmcc DSI_M_AHB_CLK>,
1168 clocks = <&mmcc DSI2_M_AHB_CLK>,
1169 <&mmcc DSI2_S_AHB_CLK>,
1170 <&mmcc AMP_AHB_CLK>,
1171 <&mmcc DSI2_CLK>,
1172 <&mmcc DSI2_BYTE_CLK>,
1173 <&mmcc DSI2_PIXEL_CLK>,
1174 <&mmcc DSI2_ESC_CLK>;
1183 assigned-clocks = <&mmcc DSI2_BYTE_SRC>,
1184 <&mmcc DSI2_ESC_SRC>,
1185 <&mmcc DSI2_SRC>,
1186 <&mmcc DSI2_PIXEL_SRC>;
1229 clocks = <&mmcc DSI2_M_AHB_CLK>,
1244 <&mmcc SMMU_AHB_CLK>,
1245 <&mmcc MDP_AXI_CLK>;
1260 <&mmcc SMMU_AHB_CLK>,
1261 <&mmcc MDP_AXI_CLK>;
1276 <&mmcc SMMU_AHB_CLK>,
1277 <&mmcc GFX3D_AXI_CLK>;
1292 <&mmcc SMMU_AHB_CLK>,
1293 <&mmcc GFX3D_AXI_CLK>;
1354 clocks = <&mmcc HDMI_APP_CLK>,
1355 <&mmcc HDMI_M_AHB_CLK>,
1356 <&mmcc HDMI_S_AHB_CLK>;
1390 clocks = <&mmcc HDMI_S_AHB_CLK>;
1402 clocks = <&mmcc MDP_CLK>,
1403 <&mmcc MDP_AHB_CLK>,
1404 <&mmcc MDP_AXI_CLK>,
1405 <&mmcc MDP_LUT_CLK>,
1406 <&mmcc HDMI_TV_CLK>,
1407 <&mmcc MDP_TV_CLK>;