Lines Matching +full:port +full:- +full:expander
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
11 compatible = "zii,vf610dev-b", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio-mux-gpio";
15 pinctrl-0 = <&pinctrl_mdio_mux>;
16 pinctrl-names = "default";
21 mdio-parent-bus = <&mdio1>;
22 #address-cells = <1>;
23 #size-cells = <0>;
27 #address-cells = <1>;
28 #size-cells = <0>;
32 pinctrl-0 = <&pinctrl_gpio_switch0>;
33 pinctrl-names = "default";
36 interrupt-parent = <&gpio0>;
38 interrupt-controller;
39 #interrupt-cells = <2>;
40 eeprom-length = <512>;
43 #address-cells = <1>;
44 #size-cells = <0>;
46 port@0 {
49 phy-handle = <&switch0phy0>;
52 port@1 {
55 phy-handle = <&switch0phy1>;
58 port@2 {
61 phy-handle = <&switch0phy2>;
64 switch0port5: port@5 {
67 phy-mode = "rgmii-txid";
70 fixed-link {
72 full-duplex;
76 port@6 {
78 phy-mode = "rmii";
81 fixed-link {
83 full-duplex;
88 #address-cells = <1>;
89 #size-cells = <0>;
92 interrupt-parent = <&switch0>;
97 interrupt-parent = <&switch0>;
102 interrupt-parent = <&switch0>;
111 #address-cells = <1>;
112 #size-cells = <0>;
116 pinctrl-0 = <&pinctrl_gpio_switch1>;
117 pinctrl-names = "default";
120 interrupt-parent = <&gpio0>;
122 interrupt-controller;
123 #interrupt-cells = <2>;
124 eeprom-length = <512>;
127 #address-cells = <1>;
128 #size-cells = <0>;
130 port@0 {
133 phy-handle = <&switch1phy0>;
136 port@1 {
139 phy-handle = <&switch1phy1>;
142 port@2 {
145 phy-handle = <&switch1phy2>;
148 switch1port5: port@5 {
152 phy-mode = "1000base-x";
154 fixed-link {
156 full-duplex;
160 switch1port6: port@6 {
163 phy-mode = "rgmii-txid";
165 fixed-link {
167 full-duplex;
172 #address-cells = <1>;
173 #size-cells = <0>;
177 interrupt-parent = <&switch1>;
183 interrupt-parent = <&switch1>;
189 interrupt-parent = <&switch1>;
197 #address-cells = <1>;
198 #size-cells = <0>;
207 #address-cells = <1>;
208 #size-cells = <0>;
210 port@0 {
213 phy-handle = <&switch2phy0>;
214 phy-mode = "sgmii";
217 port@1 {
220 phy-handle = <&switch2phy1>;
221 phy-mode = "sgmii";
224 port@2 {
227 phy-handle = <&switch2phy2>;
230 port@3 {
234 fixed-link {
236 full-duplex;
237 link-gpios = <&gpio6 2
242 port@4 {
246 fixed-link {
248 full-duplex;
249 link-gpios = <&gpio6 3
254 switch2port9: port@9 {
257 phy-mode = "1000base-x";
261 fixed-link {
263 full-duplex;
268 #address-cells = <1>;
269 #size-cells = <0>;
286 #address-cells = <1>;
287 #size-cells = <0>;
291 spi-0 {
292 compatible = "spi-gpio";
293 pinctrl-0 = <&pinctrl_gpio_spi0>;
294 pinctrl-names = "default";
295 #address-cells = <1>;
296 #size-cells = <0>;
297 sck-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
298 mosi-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
299 miso-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
300 cs-gpios = <&gpio1 9 GPIO_ACTIVE_LOW
302 num-chipselects = <2>;
305 compatible = "m25p128", "jedec,spi-nor";
306 #address-cells = <1>;
307 #size-cells = <1>;
309 spi-max-frequency = <1000000>;
314 pinctrl-0 = <&pinctrl_gpio_e6185_eeprom_sel>;
315 pinctrl-names = "default";
317 spi-max-frequency = <500000>;
318 spi-cs-high;
319 data-size = <16>;
320 select-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>;
326 gpio5: io-expander@20 {
329 gpio-controller;
330 #gpio-cells = <2>;
334 gpio6: io-expander@22 {
336 pinctrl-names = "default";
337 pinctrl-0 = <&pinctrl_pca9554_22>;
339 gpio-controller;
340 #gpio-cells = <2>;
341 #interrupt-cells = <2>;
342 interrupt-controller;
343 interrupt-parent = <&gpio3>;
349 i2c-mux@70 {
351 pinctrl-0 = <&pinctrl_i2c_mux_reset>;
352 pinctrl-names = "default";
353 #address-cells = <1>;
354 #size-cells = <0>;
356 reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
359 #address-cells = <1>;
360 #size-cells = <0>;
370 #address-cells = <1>;
371 #size-cells = <0>;
381 #address-cells = <1>;
382 #size-cells = <0>;
392 #address-cells = <1>;
393 #size-cells = <0>;
403 #address-cells = <1>;
404 #size-cells = <0>;
411 clock-frequency = <5000000>;
415 pinctrl_gpio_e6185_eeprom_sel: pinctrl-gpio-e6185-eeprom-spi0 {
421 pinctrl_gpio_spi0: pinctrl-gpio-spi0 {
431 pinctrl_mdio_mux: pinctrl-mdio-mux {
440 pinctrl_pca9554_22: pinctrl-pca95540-22 {