Lines Matching +full:port +full:- +full:expander

1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
8 model = "TQ-Systems MBA6ULx Baseboard";
18 stdout-path = &uart1;
22 compatible = "pwm-backlight";
23 power-supply = <&reg_mba6ul_3v3>;
24 enable-gpios = <&expander_out0 4 GPIO_ACTIVE_HIGH>;
29 compatible = "gpio-beeper";
33 gpio_buttons: gpio-keys {
34 compatible = "gpio-keys";
35 pinctrl-names = "default";
36 pinctrl-0 = <&pinctrl_buttons>;
38 button-1 {
42 wakeup-source;
45 button-2 {
49 wakeup-source;
52 button-3 {
56 wakeup-source;
59 power-button {
63 wakeup-source;
67 gpio-leds {
68 compatible = "gpio-leds";
74 linux,default-trigger = "default-on";
80 linux,default-trigger = "heartbeat";
84 reg_lcd_pwr: regulator-lcd-pwr {
85 compatible = "regulator-fixed";
86 regulator-name = "lcd-pwr";
88 enable-active-high;
92 reg_mba6ul_3v3: regulator-mba6ul-3v3 {
93 compatible = "regulator-fixed";
94 regulator-name = "supply-mba6ul-3v3";
95 regulator-min-microvolt = <3300000>;
96 regulator-max-microvolt = <3300000>;
97 regulator-always-on;
100 reg_mba6ul_5v0: regulator-mba6ul-5v0 {
101 compatible = "regulator-fixed";
102 regulator-name = "supply-mba6ul-5v0";
103 regulator-min-microvolt = <5000000>;
104 regulator-max-microvolt = <5000000>;
105 regulator-always-on;
108 reg_mpcie: regulator-mpcie-3v3 {
109 compatible = "regulator-fixed";
110 regulator-name = "mpcie-3v3";
111 regulator-min-microvolt = <3300000>;
112 regulator-max-microvolt = <3300000>;
114 enable-active-high;
115 regulator-always-on;
116 startup-delay-us = <500000>;
117 vin-supply = <&reg_mba6ul_3v3>;
120 reg_otg2vbus_5v0: regulator-otg2-vbus-5v0 {
121 compatible = "regulator-fixed";
123 enable-active-high;
124 regulator-name = "otg2-vbus-supply-5v0";
125 regulator-min-microvolt = <5000000>;
126 regulator-max-microvolt = <5000000>;
127 vin-supply = <&reg_mpcie>;
130 reserved-memory {
131 #address-cells = <1>;
132 #size-cells = <1>;
136 compatible = "shared-dma-pool";
139 linux,cma-default;
144 compatible = "fsl,imx-audio-tlv320aic32x4";
145 model = "imx-audio-tlv320aic32x4";
146 ssi-controller = <&sai1>;
147 audio-codec = <&tlv320aic32x4>;
148 audio-asrc = <&asrc>;
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_flexcan1>;
155 xceiver-supply = <&reg_mba6ul_3v3>;
160 pinctrl-names = "default";
161 pinctrl-0 = <&pinctrl_flexcan2>;
162 xceiver-supply = <&reg_mba6ul_3v3>;
167 assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
168 assigned-clock-rates = <768000000>;
172 pinctrl-names = "default";
173 pinctrl-0 = <&pinctrl_ecspi2>;
174 num-cs = <1>;
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_enet1>;
181 phy-mode = "rmii";
182 phy-handle = <&ethphy0>;
183 phy-supply = <&reg_mba6ul_3v3>;
184 phy-reset-gpios = <&expander_out1 1 GPIO_ACTIVE_LOW>;
185 phy-reset-duration = <25>;
186 phy-reset-post-delay = <1>;
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_enet2>, <&pinctrl_enet2_mdc>;
193 phy-mode = "rmii";
194 phy-handle = <&ethphy1>;
195 phy-supply = <&reg_mba6ul_3v3>;
196 phy-reset-gpios = <&expander_out1 2 GPIO_ACTIVE_LOW>;
197 phy-reset-duration = <25>;
198 phy-reset-post-delay = <1>;
202 #address-cells = <1>;
203 #size-cells = <0>;
205 ethphy0: ethernet-phy@0 {
206 compatible = "ethernet-phy-ieee802.3-c22";
209 max-speed = <100>;
212 ethphy1: ethernet-phy@1 {
213 compatible = "ethernet-phy-ieee802.3-c22";
216 max-speed = <100>;
222 tlv320aic32x4: audio-codec@18 {
226 clock-names = "mclk";
227 ldoin-supply = <&reg_mba6ul_3v3>;
228 iov-supply = <&reg_mba6ul_3v3>;
231 jc42: temperature-sensor@19 {
232 compatible = "nxp,se97b", "jedec,jc-42.4-temp";
236 expander_out0: gpio-expander@20 {
239 gpio-controller;
240 #gpio-cells = <2>;
241 vcc-supply = <&reg_mba6ul_3v3>;
244 expander_in0: gpio-expander@21 {
247 pinctrl-names = "default";
248 pinctrl-0 = <&pinctrl_expander_in0>;
249 interrupt-parent = <&gpio4>;
251 interrupt-controller;
252 #interrupt-cells = <2>;
253 gpio-controller;
254 #gpio-cells = <2>;
255 vcc-supply = <&reg_mba6ul_3v3>;
257 enet1_int-hog {
258 gpio-hog;
263 enet2_int-hog {
264 gpio-hog;
270 expander_out1: gpio-expander@22 {
273 gpio-controller;
274 #gpio-cells = <2>;
275 vcc-supply = <&reg_mba6ul_3v3>;
282 interrupt-parent = <&gpio4>;
286 compatible = "st,stmpe-ts";
287 st,adc-freq = <1>; /* 3.25 MHz ADC clock speed */
288 st,ave-ctrl = <3>; /* 8 sample average control */
289 st,fraction-z = <7>; /* 7 length fractional part in z */
294 st,i-drive = <1>;
295 st,mod-12b = <1>; /* 12-bit ADC */
296 st,ref-sel = <0>; /* internal ADC reference */
297 st,sample-time = <4>; /* ADC converstion time: 80 clocks */
299 st,touch-det-delay = <5>; /* 5 ms touch detect interrupt delay */
308 vcc-supply = <&reg_mba6ul_3v3>;
313 pinctrl-names = "default";
314 pinctrl-0 = <&pinctrl_pwm2>;
319 pinctrl-names = "default";
320 pinctrl-0 = <&pinctrl_sai1>;
321 assigned-clocks = <&clks IMX6UL_CLK_SAI1_SEL>,
323 assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
324 assigned-clock-rates = <0>, <24000000>;
325 fsl,sai-mclk-direction-output;
330 pinctrl-names = "default";
331 pinctrl-0 = <&pinctrl_uart1>;
336 pinctrl-names = "default";
337 pinctrl-0 = <&pinctrl_uart3>;
342 pinctrl-names = "default";
343 pinctrl-0 = <&pinctrl_uart6>;
345 /* fsl,dte-mode; */
346 /* pinctrl-0 = <&pinctrl_uart6dte>; */
347 uart-has-rtscts;
348 linux,rs485-enabled-at-boot-time;
349 rs485-rts-active-low;
350 rs485-rx-during-tx;
354 /* otg-port */
356 pinctrl-names = "default";
357 pinctrl-0 = <&pinctrl_usb_otg1>;
358 power-active-high;
359 over-current-active-low;
361 hnp-disable;
362 srp-disable;
363 adp-disable;
368 /* 7-port usb hub */
371 disable-over-current;
372 vbus-supply = <&reg_otg2vbus_5v0>;
378 pinctrl-names = "default";
379 pinctrl-0 = <&pinctrl_usdhc1>;
380 cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
381 wp-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
382 bus-width = <4>;
383 vmmc-supply = <&reg_mba6ul_3v3>;
384 vqmmc-supply = <&reg_vccsd>;
385 no-1-8-v;
386 no-mmc;
387 no-sdio;
392 pinctrl-names = "default";
393 pinctrl-0 = <&pinctrl_wdog1>;
394 fsl,ext-reset-output;
540 pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp {
555 pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp {