Lines Matching +full:0 +full:x59
14 reg = <0x80000000 0x20000000>;
34 pinctrl-0 = <&pinctrl_i2c1>;
43 pinctrl-0 = <&pinctrl_pmic1>;
45 reg = <0x08>;
137 reg = <0x48>;
143 reg = <0x1e>;
150 reg = <0x50>;
158 reg = <0x56>;
166 reg = <0x68>;
173 <MX7D_PAD_I2C1_SDA__I2C1_SDA 0x40000078>,
174 <MX7D_PAD_I2C1_SCL__I2C1_SCL 0x40000078>;
179 <MX7D_PAD_I2C1_SDA__GPIO4_IO9 0x40000078>,
180 <MX7D_PAD_I2C1_SCL__GPIO4_IO8 0x40000078>;
185 <MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x4000005C>;
190 <MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x5A>,
191 <MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 0x5A>,
192 <MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 0x5A>,
193 <MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 0x5A>,
194 <MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK 0x11>,
195 <MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B 0x54>,
196 <MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B 0x54>;
202 <MX7D_PAD_EPDC_DATA04__GPIO2_IO4 0x52>;
207 <MX7D_PAD_SD3_CMD__SD3_CMD 0x59>,
208 <MX7D_PAD_SD3_CLK__SD3_CLK 0x56>,
209 <MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59>,
210 <MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59>,
211 <MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59>,
212 <MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59>,
213 <MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59>,
214 <MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59>,
215 <MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59>,
216 <MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59>,
217 <MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19>;
222 <MX7D_PAD_SD3_CMD__SD3_CMD 0x5a>,
223 <MX7D_PAD_SD3_CLK__SD3_CLK 0x51>,
224 <MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a>,
225 <MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a>,
226 <MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a>,
227 <MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a>,
228 <MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a>,
229 <MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a>,
230 <MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a>,
231 <MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a>,
232 <MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a>;
237 <MX7D_PAD_SD3_CMD__SD3_CMD 0x5b>,
238 <MX7D_PAD_SD3_CLK__SD3_CLK 0x51>,
239 <MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b>,
240 <MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b>,
241 <MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b>,
242 <MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b>,
243 <MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b>,
244 <MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b>,
245 <MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b>,
246 <MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b>,
247 <MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b>;
254 <MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x30>;
260 pinctrl-0 = <&pinctrl_qspi &pinctrl_qspi_reset>;
263 flash0: flash@0 {
265 reg = <0>;
274 pinctrl-0 = <&pinctrl_usdhc3>;
290 pinctrl-0 = <&pinctrl_wdog1>;