Lines Matching +full:0 +full:x5e
27 gpios = <&pca9555 0 GPIO_ACTIVE_HIGH>;
43 button-0 {
86 io-channels = <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>,
87 <&adc2 0>, <&adc2 1>, <&adc2 2>, <&adc2 3>;
226 pinctrl-0 = <&pinctrl_ecspi1>, <&pinctrl_ecspi1_ss0>;
227 cs-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>, <&gpio4 1 GPIO_ACTIVE_LOW>,
234 pinctrl-0 = <&pinctrl_ecspi2>;
240 pinctrl-0 = <&pinctrl_enet1>;
249 #size-cells = <0>;
251 ethphy1_0: ethernet-phy@0 {
253 reg = <0>;
255 pinctrl-0 = <&pinctrl_enet1_phy>;
273 uboot@0 {
275 reg = <0x0 0xd0000>;
280 reg = <0xd0000 0x10000>;
285 reg = <0xe0000 0x10000>;
290 reg = <0xf0000 0x10000>;
295 reg = <0x100000 0x700000>;
300 reg = <0x800000 0x3800000>;
307 pinctrl-0 = <&pinctrl_flexcan1>;
313 pinctrl-0 = <&pinctrl_flexcan2>;
320 reg = <0x49>;
328 pinctrl-0 = <&pinctrl_i2c2>;
336 reg = <0x18>;
345 reg = <0x20>;
347 pinctrl-0 = <&pinctrl_pca9555>;
361 pinctrl-0 = <&pinctrl_i2c3>;
370 pinctrl-0 = <&pinctrl_hog_mba7_1>;
374 <MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO 0x7c>,
375 <MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x74>,
376 <MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x74>,
377 <MX7D_PAD_UART1_RX_DATA__GPIO4_IO0 0x74>,
378 <MX7D_PAD_UART1_TX_DATA__GPIO4_IO1 0x74>,
379 <MX7D_PAD_UART2_RX_DATA__GPIO4_IO2 0x74>;
384 MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x74
390 <MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO 0x7c>,
391 <MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI 0x74>,
392 <MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK 0x74>,
393 <MX7D_PAD_ECSPI2_SS0__ECSPI2_SS0 0x74>;
398 <MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x02>,
399 <MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x00>,
400 <MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x71>,
401 <MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x71>,
402 <MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x71>,
403 <MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x71>,
404 <MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x71>,
405 <MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x71>,
406 <MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x79>,
407 <MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x79>,
408 <MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x79>,
409 <MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x79>,
410 <MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x79>,
411 <MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x79>;
417 <MX7D_PAD_ENET1_COL__GPIO7_IO15 0x40000070>,
419 <MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x40000078>;
424 <MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX 0x5a>,
425 <MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX 0x52>;
430 <MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x5a>,
431 <MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x52>;
437 <MX7D_PAD_ENET1_RX_CLK__GPIO7_IO13 0x4000007c>,
438 <MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x40000074>,
440 <MX7D_PAD_UART2_TX_DATA__GPIO4_IO3 0x40000010>;
445 <MX7D_PAD_I2C2_SCL__I2C2_SCL 0x40000078>,
446 <MX7D_PAD_I2C2_SDA__I2C2_SDA 0x40000078>;
451 <MX7D_PAD_I2C2_SCL__GPIO4_IO10 0x40000078>,
452 <MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x40000078>;
457 <MX7D_PAD_I2C3_SCL__I2C3_SCL 0x40000078>,
458 <MX7D_PAD_I2C3_SDA__I2C3_SDA 0x40000078>;
463 <MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x40000078>,
464 <MX7D_PAD_I2C3_SDA__GPIO4_IO13 0x40000078>;
469 <MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12 0x78>;
474 <MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x11>,
475 <MX7D_PAD_SAI1_RX_BCLK__SAI1_RX_BCLK 0x1c>,
476 <MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0 0x1c>,
477 <MX7D_PAD_SAI1_RX_SYNC__SAI2_RX_SYNC 0x1c>,
479 <MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK 0x1c>,
480 <MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 0x14>,
481 <MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x14>;
486 <MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x7e>,
487 <MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX 0x76>,
488 <MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS 0x76>,
489 <MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS 0x7e>;
494 <MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX 0x7e>,
495 <MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX 0x76>,
496 <MX7D_PAD_SAI2_RX_DATA__UART4_DCE_CTS 0x76>,
497 <MX7D_PAD_SAI2_TX_DATA__UART4_DCE_RTS 0x7e>;
502 <MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x7e>,
503 <MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x76>;
508 <MX7D_PAD_EPDC_DATA08__UART6_DCE_RX 0x7d>,
509 <MX7D_PAD_EPDC_DATA09__UART6_DCE_TX 0x75>,
510 <MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS 0x75>,
511 <MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS 0x7d>;
516 <MX7D_PAD_EPDC_DATA12__UART7_DCE_RX 0x7e>,
517 <MX7D_PAD_EPDC_DATA13__UART7_DCE_TX 0x76>,
518 <MX7D_PAD_EPDC_DATA15__UART7_DCE_CTS 0x76>,
520 <MX7D_PAD_EPDC_DATA14__UART7_DCE_RTS 0x7e>;
526 <MX7D_PAD_SD1_WP__GPIO5_IO1 0x7c>,
528 <MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x7c>,
530 <MX7D_PAD_GPIO1_IO08__SD1_VSELECT 0x59>;
535 <MX7D_PAD_SD1_CMD__SD1_CMD 0x5e>,
536 <MX7D_PAD_SD1_CLK__SD1_CLK 0x57>,
537 <MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5e>,
538 <MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5e>,
539 <MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5e>,
540 <MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5e>;
545 <MX7D_PAD_SD1_CMD__SD1_CMD 0x5a>,
546 <MX7D_PAD_SD1_CLK__SD1_CLK 0x57>,
547 <MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a>,
548 <MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a>,
549 <MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a>,
550 <MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a>;
555 <MX7D_PAD_SD1_CMD__SD1_CMD 0x5b>,
556 <MX7D_PAD_SD1_CLK__SD1_CLK 0x57>,
557 <MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b>,
558 <MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b>,
559 <MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b>,
560 <MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b>;
568 <MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x50>;
573 <MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC 0x5c>,
574 <MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x59>;
579 <MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x30>;
585 pinctrl-0 = <&pinctrl_pwm1>;
591 pinctrl-0 = <&pinctrl_sai1>;
595 assigned-clock-rates = <0>, <36864000>;
605 pinctrl-0 = <&pinctrl_uart3>;
613 pinctrl-0 = <&pinctrl_uart4>;
621 pinctrl-0 = <&pinctrl_uart5>;
629 pinctrl-0 = <&pinctrl_uart6>;
637 pinctrl-0 = <&pinctrl_uart7>;
654 pinctrl-0 = <&pinctrl_usbotg1>;
666 pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
669 cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
681 pinctrl-0 = <&pinctrl_wdog1>;