Lines Matching +full:0 +full:x1b0b1
17 pinctrl-0 = <&pinctrl_button>;
19 button-0 {
30 pinctrl-0 = <&pinctrl_gpio_leds>;
103 pinctrl-0 = <&pinctrl_reg_vmmc>;
112 pinctrl-0 = <&pinctrl_csi1>;
118 pinctrl-0 = <&pinctrl_enet1>;
126 pinctrl-0 = <&pinctrl_enet2>;
133 #size-cells = <0>;
154 pinctrl-0 = <&pinctrl_lcdif>;
166 pinctrl-0 = <&pinctrl_sai2>;
176 pinctrl-0 = <&pinctrl_uart1>;
181 pinctrl-0 = <&pinctrl_uart2>;
187 pinctrl-0 = <&pinctrl_uart3>;
193 pinctrl-0 = <&pinctrl_uart4>;
198 pinctrl-0 = <&pinctrl_uart5>;
204 pinctrl-0 = <&pinctrl_usb_otg1_id>;
220 pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_usdhc1_cd>;
234 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
240 MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088
241 MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088
242 MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088
243 MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088
244 MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088
245 MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088
246 MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088
247 MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088
248 MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088
249 MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088
250 MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088
256 MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
257 MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
258 MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
259 MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
260 MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
261 MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
262 MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
263 MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
269 MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
270 MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
271 MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
272 MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
273 MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
274 MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
275 MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
276 MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
277 MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
278 MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
284 MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x0b0b0
285 MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x0b0b0
286 MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x0b0b0
287 MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0
293 MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
294 MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
295 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
296 MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
297 MX6UL_PAD_LCD_RESET__LCDIF_RESET 0x79
298 MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
299 MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
300 MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
301 MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
302 MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
303 MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
304 MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
305 MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
306 MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
307 MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
308 MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
309 MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
310 MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
311 MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
312 MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
313 MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
314 MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
315 MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
316 MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79
317 MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79
318 MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79
319 MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79
320 MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79
321 MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79
322 MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x79
328 MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059
334 MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x130b0
335 MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088
336 MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088
337 MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0
343 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
344 MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
350 MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
351 MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
352 MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1
353 MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS 0x1b0b1
359 MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
360 MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
361 MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b1
362 MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1
368 MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
369 MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
375 MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX 0x1b0b1
376 MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x1b0b1
382 MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059
388 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
389 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
390 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
391 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
392 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
393 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
399 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
400 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
401 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
402 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
403 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
404 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
410 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
411 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
412 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
413 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
414 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
415 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
421 MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059