Lines Matching +full:uart +full:- +full:grp
1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
6 #include "imx6ull-dhcor-som.dtsi"
10 /delete-property/ spi2;
11 /delete-property/ spi3;
20 serial3 = &uart2; /* Use BT UART always as ttymxc3 */
28 stdout-path = "serial0:115200n8";
31 reg_ext_3v3_ref: regulator-ext-3v3-ref {
32 compatible = "regulator-fixed";
33 regulator-always-on;
34 regulator-max-microvolt = <3300000>;
35 regulator-min-microvolt = <3300000>;
36 regulator-name = "VCC_3V3_REF";
39 reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
40 compatible = "regulator-fixed";
41 regulator-max-microvolt = <5000000>;
42 regulator-min-microvolt = <5000000>;
43 regulator-name = "usb-otg1-vbus";
46 reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
47 compatible = "regulator-fixed";
49 regulator-max-microvolt = <5000000>;
50 regulator-min-microvolt = <5000000>;
51 regulator-name = "usb-otg2-vbus";
55 usdhc1_pwrseq: usdhc1-pwrseq {
56 compatible = "mmc-pwrseq-simple";
57 reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; /* GPIO H */
63 shutdown-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; /* GPIO I */
67 pinctrl-0 = <&pinctrl_flexcan1>;
68 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_flexcan2>;
78 pinctrl-names = "default";
83 cs-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
84 pinctrl-0 = <&pinctrl_ecspi1>;
85 pinctrl-names = "default";
95 cs-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
96 pinctrl-0 = <&pinctrl_ecspi4>;
97 pinctrl-names = "default";
102 phy-handle = <&mdio2_phy0>;
103 phy-mode = "rmii";
104 pinctrl-0 = <&pinctrl_fec1>;
105 pinctrl-names = "default";
111 phy-handle = <&mdio2_phy1>;
112 phy-mode = "rmii";
113 pinctrl-0 = <&pinctrl_fec2>;
114 pinctrl-names = "default";
118 #address-cells = <1>;
119 #size-cells = <0>;
121 mdio2_phy0: ethernet-phy@0 {
122 compatible = "ethernet-phy-id0007.c0f0", /* SMSC LAN8710Ai */
123 "ethernet-phy-ieee802.3-c22";
125 clock-names = "rmii-ref";
127 interrupt-parent = <&gpio5>;
129 pinctrl-0 = <&pinctrl_fec1_phy &pinctrl_snvs_fec1_phy>;
130 pinctrl-names = "default";
131 reset-assert-us = <500>;
132 reset-deassert-us = <500>;
133 reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
134 smsc,disable-energy-detect; /* Make plugin detection reliable */
137 mdio2_phy1: ethernet-phy@1 {
138 compatible = "ethernet-phy-id0007.c0f0", /* SMSC LAN8710Ai */
139 "ethernet-phy-ieee802.3-c22";
141 clock-names = "rmii-ref";
143 interrupt-parent = <&gpio5>;
145 pinctrl-0 = <&pinctrl_fec2_phy &pinctrl_snvs_fec2_phy>;
146 pinctrl-names = "default";
147 reset-assert-us = <500>;
148 reset-deassert-us = <500>;
149 reset-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
150 smsc,disable-energy-detect; /* Make plugin detection reliable */
156 gpio-line-names =
159 "", "", "", "DHCOM-INT",
161 "", "", "DHCOM-I", "",
165 pinctrl-0 = <&pinctrl_spi1_switch
167 pinctrl-names = "default";
171 gpio-line-names =
176 "", "DHCOM-L", "DHCOM-K", "DHCOM-M",
177 "DHCOM-J", "DHCOM-U", "DHCOM-T", "DHCOM-S",
178 "DHCOM-R", "DHCOM-Q", "DHCOM-P", "DHCOM-O",
179 "DHCOM-N", "", "", "";
180 pinctrl-0 = <&pinctrl_dhcom_j &pinctrl_dhcom_k
186 pinctrl-names = "default";
190 gpio-line-names =
191 "DHCOM-A", "DHCOM-B", "DHCOM-C", "DHCOM-D",
192 "DHCOM-E", "", "", "DHCOM-F",
193 "DHCOM-G", "DHCOM-H", "", "",
199 pinctrl-0 = <&pinctrl_snvs_dhcom_a &pinctrl_snvs_dhcom_b
203 pinctrl-names = "default";
213 /* Microchip 24AA025E48T-I/OT containing MAC for DHCOM ETH1 */
224 vref-supply = <®_ext_3v3_ref>;
231 vref-supply = <®_ext_3v3_ref>;
234 /* Microchip 24AA025E48T-I/OT containing MAC for DHCOM ETH2 */
244 clock-frequency = <100000>;
245 pinctrl-0 = <&pinctrl_i2c2>;
246 pinctrl-1 = <&pinctrl_i2c2_gpio>;
247 pinctrl-names = "default", "gpio";
248 scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
249 sda-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
254 pinctrl-0 = <&pinctrl_lcdif>;
255 pinctrl-names = "default";
259 pinctrl-0 = <&pinctrl_pwm1>;
260 pinctrl-names = "default";
264 assigned-clock-rates = <320000000>;
265 assigned-clocks = <&clks IMX6UL_CLK_PLL3_PFD2>;
266 pinctrl-0 = <&pinctrl_sai2>;
267 pinctrl-names = "default";
271 measure-delay-time = <0xffff>;
272 pinctrl-0 = <&pinctrl_tsc>;
273 pinctrl-names = "default";
274 pre-charge-time = <0xfff>;
275 touchscreen-average-samples = <32>;
276 xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
281 pinctrl-0 = <&pinctrl_uart1>;
282 pinctrl-names = "default";
289 * Therefore this UART interface can only be used if DHCOM GPIOs J/K/L/M are
293 pinctrl-0 = <&pinctrl_uart6>;
294 pinctrl-names = "default";
295 uart-has-rtscts;
299 adp-disable;
300 disable-over-current;
302 hnp-disable;
303 pinctrl-0 = <&pinctrl_usbotg1>;
304 pinctrl-names = "default";
305 srp-disable;
306 vbus-supply = <®_usb_otg1_vbus>;
311 disable-over-current; /* Overcurrent pin is used for TSC */
313 pinctrl-0 = <&pinctrl_usbotg2>;
314 pinctrl-names = "default";
315 tpl-support;
316 vbus-supply = <®_usb_otg2_vbus>;
321 fsl,tx-d-cal = <106>;
325 fsl,tx-d-cal = <106>;
330 mmc-pwrseq = <&usdhc1_pwrseq>;
335 bus-width = <8>;
336 no-1-8-v;
337 non-removable;
338 pinctrl-0 = <&pinctrl_usdhc2>;
339 pinctrl-names = "default";
340 vmmc-supply = <&vcc_3v3>;
341 vqmmc-supply = <&vcc_3v3>;
347 pinctrl_dhcom_i: dhcom-i-grp {
351 pinctrl_dhcom_j: dhcom-j-grp {
355 pinctrl_dhcom_k: dhcom-k-grp {
359 pinctrl_dhcom_l: dhcom-l-grp {
363 pinctrl_dhcom_m: dhcom-m-grp {
367 pinctrl_dhcom_n: dhcom-n-grp {
371 pinctrl_dhcom_o: dhcom-o-grp {
375 pinctrl_dhcom_p: dhcom-p-grp {
379 pinctrl_dhcom_q: dhcom-q-grp {
383 pinctrl_dhcom_r: dhcom-r-grp {
387 pinctrl_dhcom_s: dhcom-s-grp {
391 pinctrl_dhcom_t: dhcom-t-grp {
395 pinctrl_dhcom_u: dhcom-u-grp {
399 pinctrl_dhcom_int: dhcom-int-grp {
403 pinctrl_ecspi1: ecspi1-grp {
412 pinctrl_ecspi4: ecspi4-grp {
421 pinctrl_fec1: fec1-grp {
435 pinctrl_fec1_phy: fec1-phy-grp {
441 pinctrl_fec2: fec2-grp {
456 pinctrl_fec2_phy: fec2-phy-grp {
462 pinctrl_flexcan1: flexcan1-grp {
469 pinctrl_flexcan2: flexcan2-grp {
476 pinctrl_i2c2: i2c2-grp {
483 pinctrl_i2c2_gpio: i2c2-gpio-grp {
490 pinctrl_lcdif: lcdif-grp {
517 pinctrl_pwm1: pwm1-grp {
523 pinctrl_sai2: sai2-grp {
532 pinctrl_tsc: tsc-grp {
541 pinctrl_uart1: uart1-grp {
548 pinctrl_uart6: uart6-grp {
557 pinctrl_usbotg1: usbotg1-grp {
563 pinctrl_usbotg2: usbotg2-grp {
569 pinctrl_usdhc2: usdhc2-grp {
588 pinctrl_snvs_dhcom_a: snvs-dhcom-a-grp {
592 pinctrl_snvs_dhcom_b: snvs-dhcom-b-grp {
596 pinctrl_snvs_dhcom_c: snvs-dhcom-c-grp {
600 pinctrl_snvs_dhcom_d: snvs-dhcom-d-grp {
604 pinctrl_snvs_dhcom_e: snvs-dhcom-e-grp {
608 pinctrl_snvs_dhcom_f: snvs-dhcom-f-grp {
612 pinctrl_snvs_dhcom_g: snvs-dhcom-g-grp {
616 pinctrl_snvs_dhcom_h: snvs-dhcom-h-grp {
620 pinctrl_snvs_fec1_phy: snvs-fec1-phy-grp {
626 pinctrl_snvs_fec2_phy: snvs-fec2-phy-grp {