Lines Matching full:interrupts
98 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
137 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
157 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
170 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
185 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
218 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
232 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
246 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
260 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
273 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
286 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
299 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
312 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
327 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
342 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
356 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
382 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
393 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
404 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
415 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
426 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
437 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
448 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
459 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
468 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
482 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
495 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
508 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
521 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
535 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
555 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
563 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
570 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
578 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
589 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
644 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
656 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
665 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
679 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
695 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
708 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
713 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
719 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
729 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
759 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
770 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
781 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
792 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
803 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
814 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
836 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
844 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
850 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
856 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
863 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
876 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
896 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
916 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
930 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
944 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
957 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
967 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
977 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
993 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1030 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
1039 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
1050 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
1061 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1071 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
1080 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1093 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
1106 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
1119 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1133 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
1142 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;