Lines Matching +full:imx6ul +full:- +full:anatop
1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
57 #address-cells = <1>;
58 #size-cells = <0>;
61 compatible = "arm,cortex-a7";
64 clock-frequency = <696000000>;
65 clock-latency = <61036>; /* two CLK32 periods */
66 #cooling-cells = <2>;
67 operating-points =
73 fsl,soc-operating-points =
86 clock-names = "arm", "pll2_bus", "pll2_pfd2_396m",
89 arm-supply = <®_arm>;
90 soc-supply = <®_soc>;
91 nvmem-cells = <&cpu_speed_grade>;
92 nvmem-cell-names = "speed_grade";
97 compatible = "arm,armv7-timer";
102 interrupt-parent = <&intc>;
106 ckil: clock-cli {
107 compatible = "fixed-clock";
108 #clock-cells = <0>;
109 clock-frequency = <32768>;
110 clock-output-names = "ckil";
113 osc: clock-osc {
114 compatible = "fixed-clock";
115 #clock-cells = <0>;
116 clock-frequency = <24000000>;
117 clock-output-names = "osc";
120 ipp_di0: clock-di0 {
121 compatible = "fixed-clock";
122 #clock-cells = <0>;
123 clock-frequency = <0>;
124 clock-output-names = "ipp_di0";
127 ipp_di1: clock-di1 {
128 compatible = "fixed-clock";
129 #clock-cells = <0>;
130 clock-frequency = <0>;
131 clock-output-names = "ipp_di1";
135 compatible = "arm,cortex-a7-pmu";
136 interrupt-parent = <&gpc>;
141 #address-cells = <1>;
142 #size-cells = <1>;
143 compatible = "simple-bus";
144 interrupt-parent = <&gpc>;
148 compatible = "mmio-sram";
151 #address-cells = <1>;
152 #size-cells = <1>;
155 intc: interrupt-controller@a01000 {
156 compatible = "arm,gic-400", "arm,cortex-a7-gic";
158 #interrupt-cells = <3>;
159 interrupt-controller;
160 interrupt-parent = <&intc>;
167 dma_apbh: dma-controller@1804000 {
168 compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
174 #dma-cells = <1>;
175 dma-channels = <4>;
179 gpmi: nand-controller@1806000 {
180 compatible = "fsl,imx6q-gpmi-nand";
181 #address-cells = <1>;
182 #size-cells = <0>;
184 reg-names = "gpmi-nand", "bch";
186 interrupt-names = "bch";
192 clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
195 dma-names = "rx-tx";
200 compatible = "fsl,aips-bus", "simple-bus";
201 #address-cells = <1>;
202 #size-cells = <1>;
206 spba-bus@2000000 {
207 compatible = "fsl,spba-bus", "simple-bus";
208 #address-cells = <1>;
209 #size-cells = <1>;
214 #address-cells = <1>;
215 #size-cells = <0>;
216 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
221 clock-names = "ipg", "per";
223 dma-names = "rx", "tx";
228 #address-cells = <1>;
229 #size-cells = <0>;
230 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
235 clock-names = "ipg", "per";
237 dma-names = "rx", "tx";
242 #address-cells = <1>;
243 #size-cells = <0>;
244 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
249 clock-names = "ipg", "per";
251 dma-names = "rx", "tx";
256 #address-cells = <1>;
257 #size-cells = <0>;
258 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
263 clock-names = "ipg", "per";
265 dma-names = "rx", "tx";
270 compatible = "fsl,imx6ul-uart",
271 "fsl,imx6q-uart";
276 clock-names = "ipg", "per";
281 compatible = "fsl,imx6ul-uart",
282 "fsl,imx6q-uart";
287 clock-names = "ipg", "per";
292 compatible = "fsl,imx6ul-uart",
293 "fsl,imx6q-uart";
298 clock-names = "ipg", "per";
303 #sound-dai-cells = <0>;
304 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
310 clock-names = "bus", "mclk1", "mclk2", "mclk3";
313 dma-names = "rx", "tx";
318 #sound-dai-cells = <0>;
319 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
325 clock-names = "bus", "mclk1", "mclk2", "mclk3";
328 dma-names = "rx", "tx";
333 #sound-dai-cells = <0>;
334 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
340 clock-names = "bus", "mclk1", "mclk2", "mclk3";
343 dma-names = "rx", "tx";
348 compatible = "fsl,imx6ul-asrc", "fsl,imx53-asrc";
358 clock-names = "mem", "ipg", "asrck_0",
365 dma-names = "rxa", "rxb", "rxc",
367 fsl,asrc-rate = <48000>;
368 fsl,asrc-width = <16>;
374 compatible = "fsl,imx6ul-tsc";
380 clock-names = "tsc", "adc";
385 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
390 clock-names = "ipg", "per";
391 #pwm-cells = <3>;
396 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
401 clock-names = "ipg", "per";
402 #pwm-cells = <3>;
407 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
412 clock-names = "ipg", "per";
413 #pwm-cells = <3>;
418 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
423 clock-names = "ipg", "per";
424 #pwm-cells = <3>;
429 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
434 clock-names = "ipg", "per";
435 fsl,stop-mode = <&gpr 0x10 1>;
440 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
445 clock-names = "ipg", "per";
446 fsl,stop-mode = <&gpr 0x10 2>;
451 compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
456 clock-names = "ipg", "per";
460 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
465 gpio-controller;
466 #gpio-cells = <2>;
467 interrupt-controller;
468 #interrupt-cells = <2>;
469 gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>,
474 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
479 gpio-controller;
480 #gpio-cells = <2>;
481 interrupt-controller;
482 #interrupt-cells = <2>;
483 gpio-ranges = <&iomuxc 0 49 16>, <&iomuxc 16 111 6>;
487 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
492 gpio-controller;
493 #gpio-cells = <2>;
494 interrupt-controller;
495 #interrupt-cells = <2>;
496 gpio-ranges = <&iomuxc 0 65 29>;
500 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
505 gpio-controller;
506 #gpio-cells = <2>;
507 interrupt-controller;
508 #interrupt-cells = <2>;
509 gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>;
513 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
518 gpio-controller;
519 #gpio-cells = <2>;
520 interrupt-controller;
521 #interrupt-cells = <2>;
522 gpio-ranges = <&iomuxc 0 7 10>, <&iomuxc 10 5 2>;
526 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
528 interrupt-names = "int0", "pps";
535 clock-names = "ipg", "ahb", "ptp",
537 fsl,num-tx-queues = <1>;
538 fsl,num-rx-queues = <1>;
539 fsl,stop-mode = <&gpr 0x10 4>;
540 fsl,magic-packet;
541 nvmem-cells = <&fec2_mac_addr>;
542 nvmem-cell-names = "mac-address";
547 compatible = "fsl,imx6ul-kpp", "fsl,imx21-kpp";
555 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
562 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
569 clks: clock-controller@20c4000 {
570 compatible = "fsl,imx6ul-ccm";
574 #clock-cells = <1>;
576 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
579 anatop: anatop@20c8000 { label
580 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
581 "syscon", "simple-mfd";
587 reg_3p0: regulator-3p0 {
588 compatible = "fsl,anatop-regulator";
589 regulator-name = "vdd3p0";
590 regulator-min-microvolt = <2625000>;
591 regulator-max-microvolt = <3400000>;
592 anatop-reg-offset = <0x120>;
593 anatop-vol-bit-shift = <8>;
594 anatop-vol-bit-width = <5>;
595 anatop-min-bit-val = <0>;
596 anatop-min-voltage = <2625000>;
597 anatop-max-voltage = <3400000>;
598 anatop-enable-bit = <0>;
601 reg_arm: regulator-vddcore {
602 compatible = "fsl,anatop-regulator";
603 regulator-name = "cpu";
604 regulator-min-microvolt = <725000>;
605 regulator-max-microvolt = <1450000>;
606 regulator-always-on;
607 anatop-reg-offset = <0x140>;
608 anatop-vol-bit-shift = <0>;
609 anatop-vol-bit-width = <5>;
610 anatop-delay-reg-offset = <0x170>;
611 anatop-delay-bit-shift = <24>;
612 anatop-delay-bit-width = <2>;
613 anatop-min-bit-val = <1>;
614 anatop-min-voltage = <725000>;
615 anatop-max-voltage = <1450000>;
618 reg_soc: regulator-vddsoc {
619 compatible = "fsl,anatop-regulator";
620 regulator-name = "vddsoc";
621 regulator-min-microvolt = <725000>;
622 regulator-max-microvolt = <1450000>;
623 regulator-always-on;
624 anatop-reg-offset = <0x140>;
625 anatop-vol-bit-shift = <18>;
626 anatop-vol-bit-width = <5>;
627 anatop-delay-reg-offset = <0x170>;
628 anatop-delay-bit-shift = <28>;
629 anatop-delay-bit-width = <2>;
630 anatop-min-bit-val = <1>;
631 anatop-min-voltage = <725000>;
632 anatop-max-voltage = <1450000>;
636 compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
637 interrupt-parent = <&gpc>;
639 fsl,tempmon = <&anatop>;
640 nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
641 nvmem-cell-names = "calib", "temp_grade";
643 #thermal-sensor-cells = <0>;
648 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
652 phy-3p0-supply = <®_3p0>;
653 fsl,anatop = <&anatop>;
657 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
661 phy-3p0-supply = <®_3p0>;
662 fsl,anatop = <&anatop>;
666 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
669 snvs_rtc: snvs-rtc-lp {
670 compatible = "fsl,sec-v4.0-mon-rtc-lp";
677 snvs_poweroff: snvs-poweroff {
678 compatible = "syscon-poweroff";
686 snvs_pwrkey: snvs-powerkey {
687 compatible = "fsl,sec-v4.0-pwrkey";
691 wakeup-source;
695 snvs_lpgpr: snvs-lpgpr {
696 compatible = "fsl,imx6ul-snvs-lpgpr";
710 src: reset-controller@20d8000 {
711 compatible = "fsl,imx6ul-src", "fsl,imx51-src";
715 #reset-cells = <1>;
719 compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc";
721 interrupt-controller;
722 #interrupt-cells = <3>;
724 interrupt-parent = <&intc>;
726 clock-names = "ipg";
729 #address-cells = <1>;
730 #size-cells = <0>;
732 power-domain@0 {
734 #power-domain-cells = <0>;
740 compatible = "fsl,imx6ul-iomuxc";
744 gpr: iomuxc-gpr@20e4000 {
745 compatible = "fsl,imx6ul-iomuxc-gpr",
746 "fsl,imx6q-iomuxc-gpr", "syscon";
751 compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
756 clock-names = "ipg", "per";
760 sdma: dma-controller@20ec000 {
761 compatible = "fsl,imx6ul-sdma", "fsl,imx6q-sdma",
762 "fsl,imx35-sdma";
767 clock-names = "ipg", "ahb";
768 #dma-cells = <3>;
769 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
773 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
778 clock-names = "ipg", "per";
779 #pwm-cells = <3>;
784 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
789 clock-names = "ipg", "per";
790 #pwm-cells = <3>;
795 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
800 clock-names = "ipg", "per";
801 #pwm-cells = <3>;
806 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
811 clock-names = "ipg", "per";
812 #pwm-cells = <3>;
818 compatible = "fsl,aips-bus", "simple-bus";
819 #address-cells = <1>;
820 #size-cells = <1>;
825 compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0";
826 #address-cells = <1>;
827 #size-cells = <1>;
833 clock-names = "ipg", "aclk", "mem";
836 compatible = "fsl,sec-v4.0-job-ring";
842 compatible = "fsl,sec-v4.0-job-ring";
848 compatible = "fsl,sec-v4.0-job-ring";
855 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
861 ahb-burst-config = <0x0>;
862 tx-burst-size-dword = <0x10>;
863 rx-burst-size-dword = <0x10>;
868 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
874 ahb-burst-config = <0x0>;
875 tx-burst-size-dword = <0x10>;
876 rx-burst-size-dword = <0x10>;
881 #index-cells = <1>;
882 compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc";
887 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
889 interrupt-names = "int0", "pps";
896 clock-names = "ipg", "ahb", "ptp",
898 fsl,num-tx-queues = <1>;
899 fsl,num-rx-queues = <1>;
900 fsl,stop-mode = <&gpr 0x10 3>;
901 fsl,magic-packet;
902 nvmem-cells = <&fec1_mac_addr>;
903 nvmem-cell-names = "mac-address";
908 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
914 clock-names = "ipg", "ahb", "per";
915 fsl,tuning-step = <2>;
916 fsl,tuning-start-tap = <20>;
917 bus-width = <4>;
922 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
928 clock-names = "ipg", "ahb", "per";
929 bus-width = <4>;
930 fsl,tuning-step = <2>;
931 fsl,tuning-start-tap = <20>;
936 compatible = "fsl,imx6ul-adc", "fsl,vf610-adc";
940 clock-names = "adc";
941 fsl,adck-max-frequency = <30000000>, <40000000>,
947 #address-cells = <1>;
948 #size-cells = <0>;
949 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
957 #address-cells = <1>;
958 #size-cells = <0>;
959 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
967 #address-cells = <1>;
968 #size-cells = <0>;
969 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
976 memory-controller@21b0000 {
977 compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc";
982 weim: memory-controller@21b8000 {
983 #address-cells = <2>;
984 #size-cells = <1>;
985 compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim";
989 fsl,weim-cs-gpr = <&gpr>;
994 #address-cells = <1>;
995 #size-cells = <1>;
996 compatible = "fsl,imx6ul-ocotp", "syscon";
1004 tempmon_temp_grade: temp-grade@20 {
1008 cpu_speed_grade: speed-grade@10 {
1012 fec1_mac_addr: mac-addr@88 {
1016 fec2_mac_addr: mac-addr@8e {
1022 compatible = "fsl,imx6ul-csi";
1026 clock-names = "mclk";
1031 compatible = "fsl,imx6ul-lcdif", "fsl,imx6sx-lcdif";
1037 clock-names = "pix", "axi", "disp_axi";
1042 compatible = "fsl,imx6ul-pxp";
1046 clock-names = "axi";
1050 #address-cells = <1>;
1051 #size-cells = <0>;
1052 compatible = "fsl,imx6ul-qspi";
1054 reg-names = "QuadSPI", "QuadSPI-memory";
1058 clock-names = "qspi_en", "qspi";
1063 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
1071 compatible = "fsl,imx6ul-uart",
1072 "fsl,imx6q-uart";
1077 clock-names = "ipg", "per";
1082 compatible = "fsl,imx6ul-uart",
1083 "fsl,imx6q-uart";
1088 clock-names = "ipg", "per";
1093 compatible = "fsl,imx6ul-uart",
1094 "fsl,imx6q-uart";
1099 clock-names = "ipg", "per";
1104 compatible = "fsl,imx6ul-uart",
1105 "fsl,imx6q-uart";
1110 clock-names = "ipg", "per";
1115 #address-cells = <1>;
1116 #size-cells = <0>;
1117 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
1125 compatible = "fsl,imx6ul-uart",
1126 "fsl,imx6q-uart";
1131 clock-names = "ipg", "per";