Lines Matching +full:0 +full:x020c4000
58 #size-cells = <0>;
60 cpu0: cpu@0 {
63 reg = <0>;
108 #clock-cells = <0>;
115 #clock-cells = <0>;
122 #clock-cells = <0>;
123 clock-frequency = <0>;
129 #clock-cells = <0>;
130 clock-frequency = <0>;
149 reg = <0x00900000 0x20000>;
150 ranges = <0 0x00900000 0x20000>;
161 reg = <0x00a01000 0x1000>,
162 <0x00a02000 0x2000>,
163 <0x00a04000 0x2000>,
164 <0x00a06000 0x2000>;
169 reg = <0x01804000 0x2000>;
170 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
171 <0 13 IRQ_TYPE_LEVEL_HIGH>,
172 <0 13 IRQ_TYPE_LEVEL_HIGH>,
173 <0 13 IRQ_TYPE_LEVEL_HIGH>;
182 #size-cells = <0>;
183 reg = <0x01806000 0x2000>, <0x01808000 0x2000>;
185 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
194 dmas = <&dma_apbh 0>;
203 reg = <0x02000000 0x100000>;
210 reg = <0x02000000 0x40000>;
215 #size-cells = <0>;
217 reg = <0x02008000 0x4000>;
229 #size-cells = <0>;
231 reg = <0x0200c000 0x4000>;
243 #size-cells = <0>;
245 reg = <0x02010000 0x4000>;
257 #size-cells = <0>;
259 reg = <0x02014000 0x4000>;
272 reg = <0x02018000 0x4000>;
283 reg = <0x02020000 0x4000>;
294 reg = <0x02024000 0x4000>;
303 #sound-dai-cells = <0>;
305 reg = <0x02028000 0x4000>;
311 dmas = <&sdma 35 24 0>,
312 <&sdma 36 24 0>;
318 #sound-dai-cells = <0>;
320 reg = <0x0202c000 0x4000>;
326 dmas = <&sdma 37 24 0>,
327 <&sdma 38 24 0>;
333 #sound-dai-cells = <0>;
335 reg = <0x02030000 0x4000>;
341 dmas = <&sdma 39 24 0>,
342 <&sdma 40 24 0>;
349 reg = <0x2034000 0x4000>;
352 <&clks IMX6UL_CLK_ASRC_MEM>, <&clks 0>,
353 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
354 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
355 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
356 <&clks IMX6UL_CLK_SPDIF>, <&clks 0>, <&clks 0>,
375 reg = <0x02040000 0x4000>, <0x0219c000 0x4000>;
386 reg = <0x02080000 0x4000>;
397 reg = <0x02084000 0x4000>;
408 reg = <0x02088000 0x4000>;
419 reg = <0x0208c000 0x4000>;
430 reg = <0x02090000 0x4000>;
435 fsl,stop-mode = <&gpr 0x10 1>;
441 reg = <0x02094000 0x4000>;
446 fsl,stop-mode = <&gpr 0x10 2>;
452 reg = <0x02098000 0x4000>;
461 reg = <0x0209c000 0x4000>;
469 gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>,
475 reg = <0x020a0000 0x4000>;
483 gpio-ranges = <&iomuxc 0 49 16>, <&iomuxc 16 111 6>;
488 reg = <0x020a4000 0x4000>;
496 gpio-ranges = <&iomuxc 0 65 29>;
501 reg = <0x020a8000 0x4000>;
509 gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>;
514 reg = <0x020ac000 0x4000>;
522 gpio-ranges = <&iomuxc 0 7 10>, <&iomuxc 10 5 2>;
527 reg = <0x020b4000 0x4000>;
539 fsl,stop-mode = <&gpr 0x10 4>;
548 reg = <0x020b8000 0x4000>;
556 reg = <0x020bc000 0x4000>;
563 reg = <0x020c0000 0x4000>;
571 reg = <0x020c4000 0x4000>;
582 reg = <0x020c8000 0x1000>;
592 anatop-reg-offset = <0x120>;
595 anatop-min-bit-val = <0>;
598 anatop-enable-bit = <0>;
607 anatop-reg-offset = <0x140>;
608 anatop-vol-bit-shift = <0>;
610 anatop-delay-reg-offset = <0x170>;
624 anatop-reg-offset = <0x140>;
627 anatop-delay-reg-offset = <0x170>;
643 #thermal-sensor-cells = <0>;
649 reg = <0x020c9000 0x1000>;
658 reg = <0x020ca000 0x1000>;
666 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
667 reg = <0x020cc000 0x4000>;
670 compatible = "fsl,sec-v4.0-mon-rtc-lp";
672 offset = <0x34>;
680 offset = <0x38>;
681 value = <0x60>;
682 mask = <0x60>;
687 compatible = "fsl,sec-v4.0-pwrkey";
701 reg = <0x020d0000 0x4000>;
706 reg = <0x020d4000 0x4000>;
712 reg = <0x020d8000 0x4000>;
720 reg = <0x020dc000 0x4000>;
730 #size-cells = <0>;
732 power-domain@0 {
733 reg = <0>;
734 #power-domain-cells = <0>;
741 reg = <0x020e0000 0x4000>;
747 reg = <0x020e4000 0x4000>;
752 reg = <0x020e8000 0x4000>;
763 reg = <0x020ec000 0x4000>;
774 reg = <0x020f0000 0x4000>;
785 reg = <0x020f4000 0x4000>;
796 reg = <0x020f8000 0x4000>;
807 reg = <0x020fc000 0x4000>;
821 reg = <0x02100000 0x100000>;
825 compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0";
828 reg = <0x2140000 0x3c000>;
829 ranges = <0 0x2140000 0x3c000>;
836 compatible = "fsl,sec-v4.0-job-ring";
837 reg = <0x1000 0x1000>;
842 compatible = "fsl,sec-v4.0-job-ring";
843 reg = <0x2000 0x1000>;
848 compatible = "fsl,sec-v4.0-job-ring";
849 reg = <0x3000 0x1000>;
856 reg = <0x02184000 0x200>;
860 fsl,usbmisc = <&usbmisc 0>;
861 ahb-burst-config = <0x0>;
862 tx-burst-size-dword = <0x10>;
863 rx-burst-size-dword = <0x10>;
869 reg = <0x02184200 0x200>;
874 ahb-burst-config = <0x0>;
875 tx-burst-size-dword = <0x10>;
876 rx-burst-size-dword = <0x10>;
883 reg = <0x02184800 0x200>;
888 reg = <0x02188000 0x4000>;
900 fsl,stop-mode = <&gpr 0x10 3>;
909 reg = <0x02190000 0x4000>;
923 reg = <0x02194000 0x4000>;
937 reg = <0x02198000 0x4000>;
948 #size-cells = <0>;
950 reg = <0x021a0000 0x4000>;
958 #size-cells = <0>;
960 reg = <0x021a4000 0x4000>;
968 #size-cells = <0>;
970 reg = <0x021a8000 0x4000>;
978 reg = <0x021b0000 0x4000>;
986 reg = <0x021b8000 0x4000>;
997 reg = <0x021bc000 0x4000>;
1001 reg = <0x38 4>;
1005 reg = <0x20 4>;
1009 reg = <0x10 4>;
1013 reg = <0x88 6>;
1017 reg = <0x8e 6>;
1023 reg = <0x021c4000 0x4000>;
1032 reg = <0x021c8000 0x4000>;
1043 reg = <0x021cc000 0x4000>;
1051 #size-cells = <0>;
1053 reg = <0x021e0000 0x4000>, <0x60000000 0x10000000>;
1064 reg = <0x021e4000 0x4000>;
1073 reg = <0x021e8000 0x4000>;
1084 reg = <0x021ec000 0x4000>;
1095 reg = <0x021f0000 0x4000>;
1106 reg = <0x021f4000 0x4000>;
1116 #size-cells = <0>;
1118 reg = <0x021f8000 0x4000>;
1127 reg = <0x021fc000 0x4000>;