Lines Matching +full:0 +full:x02080000
51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x0>;
86 #clock-cells = <0>;
92 #clock-cells = <0>;
100 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
105 #phy-cells = <0>;
117 reg = <0x00900000 0x20000>;
118 ranges = <0 0x00900000 0x20000>;
128 reg = <0x00a01000 0x1000>,
129 <0x00a00100 0x100>;
135 reg = <0x00a02000 0x1000>;
136 interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
147 reg = <0x02000000 0x100000>;
154 reg = <0x02000000 0x40000>;
160 reg = <0x02004000 0x4000>;
161 interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
162 dmas = <&sdma 14 18 0>,
163 <&sdma 15 18 0>;
180 #size-cells = <0>;
182 reg = <0x02008000 0x4000>;
183 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
192 #size-cells = <0>;
194 reg = <0x0200c000 0x4000>;
195 interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
204 #size-cells = <0>;
206 reg = <0x02010000 0x4000>;
207 interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>;
216 #size-cells = <0>;
218 reg = <0x02014000 0x4000>;
219 interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
229 reg = <0x02018000 0x4000>;
230 interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
234 dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
242 reg = <0x02020000 0x4000>;
243 interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
247 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
255 reg = <0x02024000 0x4000>;
256 interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>;
260 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
266 #sound-dai-cells = <0>;
269 reg = <0x02028000 0x4000>;
270 interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
274 dmas = <&sdma 37 1 0>,
275 <&sdma 38 1 0>;
282 #sound-dai-cells = <0>;
285 reg = <0x0202c000 0x4000>;
286 interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
290 dmas = <&sdma 41 1 0>,
291 <&sdma 42 1 0>;
298 #sound-dai-cells = <0>;
301 reg = <0x02030000 0x4000>;
302 interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
306 dmas = <&sdma 45 1 0>,
307 <&sdma 46 1 0>;
316 reg = <0x02034000 0x4000>;
317 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
321 dmas = <&sdma 29 4 0>, <&sdma 30 4 0>;
329 reg = <0x02038000 0x4000>;
330 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
334 dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
343 reg = <0x02080000 0x4000>;
344 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
353 reg = <0x02084000 0x4000>;
354 interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
363 reg = <0x02088000 0x4000>;
364 interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
373 reg = <0x0208c000 0x4000>;
374 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
382 reg = <0x02098000 0x4000>;
383 interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
391 reg = <0x0209c000 0x4000>;
392 interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>,
393 <0 67 IRQ_TYPE_LEVEL_HIGH>;
398 gpio-ranges = <&iomuxc 0 22 1>, <&iomuxc 1 20 2>,
408 reg = <0x020a0000 0x4000>;
409 interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>,
410 <0 69 IRQ_TYPE_LEVEL_HIGH>;
415 gpio-ranges = <&iomuxc 0 53 3>, <&iomuxc 3 72 2>,
426 reg = <0x020a4000 0x4000>;
427 interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>,
428 <0 71 IRQ_TYPE_LEVEL_HIGH>;
433 gpio-ranges = <&iomuxc 0 112 8>, <&iomuxc 8 121 4>,
445 reg = <0x020a8000 0x4000>;
446 interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>,
447 <0 73 IRQ_TYPE_LEVEL_HIGH>;
452 gpio-ranges = <&iomuxc 0 95 1>, <&iomuxc 1 103 1>,
471 reg = <0x020ac000 0x4000>;
472 interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>,
473 <0 75 IRQ_TYPE_LEVEL_HIGH>;
478 gpio-ranges = <&iomuxc 0 158 1>, <&iomuxc 1 151 1>,
493 reg = <0x020b8000 0x4000>;
494 interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
501 reg = <0x020bc000 0x4000>;
502 interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
508 reg = <0x020c0000 0x4000>;
509 interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
516 reg = <0x020c4000 0x4000>;
517 interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,
518 <0 88 IRQ_TYPE_LEVEL_HIGH>;
526 reg = <0x020c8000 0x1000>;
527 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
528 <0 54 IRQ_TYPE_LEVEL_HIGH>,
529 <0 127 IRQ_TYPE_LEVEL_HIGH>;
537 anatop-reg-offset = <0x110>;
543 anatop-enable-bit = <0>;
552 anatop-reg-offset = <0x120>;
555 anatop-min-bit-val = <0>;
558 anatop-enable-bit = <0>;
567 anatop-reg-offset = <0x130>;
570 anatop-min-bit-val = <0>;
573 anatop-enable-bit = <0>;
582 anatop-reg-offset = <0x140>;
583 anatop-vol-bit-shift = <0>;
585 anatop-delay-reg-offset = <0x170>;
598 anatop-reg-offset = <0x140>;
601 anatop-delay-reg-offset = <0x170>;
615 anatop-reg-offset = <0x140>;
618 anatop-delay-reg-offset = <0x170>;
628 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
639 reg = <0x020c9000 0x1000>;
640 interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
647 reg = <0x020ca000 0x1000>;
648 interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
654 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
655 reg = <0x020cc000 0x4000>;
658 compatible = "fsl,sec-v4.0-mon-rtc-lp";
660 offset = <0x34>;
661 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
662 <0 20 IRQ_TYPE_LEVEL_HIGH>;
668 offset = <0x38>;
669 value = <0x60>;
670 mask = <0x60>;
676 reg = <0x020d0000 0x4000>;
677 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
681 reg = <0x020d4000 0x4000>;
682 interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
687 reg = <0x020d8000 0x4000>;
688 interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>,
689 <0 96 IRQ_TYPE_LEVEL_HIGH>;
695 reg = <0x020dc000 0x4000>;
698 interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
705 #size-cells = <0>;
707 power-domain@0 {
708 reg = <0>;
709 #power-domain-cells = <0>;
714 #power-domain-cells = <0>;
722 #power-domain-cells = <0>;
735 reg = <0x020e0000 0x38>;
740 reg = <0x020e0000 0x4000>;
744 reg = <0x020e4000 0x4000>;
745 interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
749 reg = <0x020e8000 0x4000>;
750 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
755 reg = <0x020ec000 0x4000>;
756 interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
766 reg = <0x020f0000 0x4000>;
767 interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
771 reg = <0x020f4000 0x4000>;
772 interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
777 reg = <0x020f8000 0x4000>;
778 interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
789 reg = <0x020fc000 0x4000>;
790 interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>,
791 <0 100 IRQ_TYPE_LEVEL_HIGH>,
792 <0 101 IRQ_TYPE_LEVEL_HIGH>;
800 reg = <0x02100000 0x100000>;
805 reg = <0x02184000 0x200>;
806 interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>;
809 fsl,usbmisc = <&usbmisc 0>;
810 ahb-burst-config = <0x0>;
811 tx-burst-size-dword = <0x10>;
812 rx-burst-size-dword = <0x10>;
818 reg = <0x02184200 0x200>;
819 interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
823 ahb-burst-config = <0x0>;
824 tx-burst-size-dword = <0x10>;
825 rx-burst-size-dword = <0x10>;
831 reg = <0x02184400 0x200>;
832 interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
838 ahb-burst-config = <0x0>;
839 tx-burst-size-dword = <0x10>;
840 rx-burst-size-dword = <0x10>;
847 reg = <0x02184800 0x200>;
853 reg = <0x02188000 0x4000>;
854 interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
863 reg = <0x02190000 0x4000>;
864 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
875 reg = <0x02194000 0x4000>;
876 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
887 reg = <0x02198000 0x4000>;
888 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
899 reg = <0x0219c000 0x4000>;
900 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
911 #size-cells = <0>;
913 reg = <0x021a0000 0x4000>;
914 interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
921 #size-cells = <0>;
923 reg = <0x021a4000 0x4000>;
924 interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
931 #size-cells = <0>;
933 reg = <0x021a8000 0x4000>;
934 interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>;
941 reg = <0x021b0000 0x4000>;
947 reg = <0x021b4000 0x4000>;
948 interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
955 reg = <0x021b8000 0x4000>;
956 interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
963 reg = <0x021bc000 0x4000>;
969 reg = <0x10 4>;
973 reg = <0x38 4>;
977 reg = <0x20 4>;
983 reg = <0x021d8000 0x4000>;
990 reg = <0x02200000 0x4000>;
991 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
1000 reg = <0x02204000 0x4000>;
1001 interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;