Lines Matching +full:0 +full:x1b0b1

15 		reg = <0x10000000 0x40000000>;
39 pinctrl-0 = <&pinctrl_audmux>;
65 pinctrl-0 = <&pinctrl_flexcan1>;
71 pinctrl-0 = <&pinctrl_flexcan2>;
77 pinctrl-0 = <&pinctrl_ecspi1>;
83 pinctrl-0 = <&pinctrl_enet>;
90 pinctrl-0 = <&pinctrl_hdmicec>;
97 pinctrl-0 = <&pinctrl_i2c1>;
104 pinctrl-0 = <&pinctrl_i2c2>;
109 pinctrl-0 = <&pinctrl_pmic>;
111 reg = <0x08>;
179 reg = <0x1b>;
180 #sound-dai-cells = <0>;
185 ai3x-ocmv = <0>;
192 pinctrl-0 = <&pinctrl_i2c3>;
199 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
200 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
201 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
202 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
204 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
211 MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b1
213 MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x000b0
219 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
220 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
221 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
223 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
225 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
231 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
232 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
233 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
234 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
235 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
236 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
237 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
238 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
239 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
240 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
241 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
242 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
243 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
244 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
245 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
251 MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
252 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
258 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
259 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
265 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
271 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
272 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
278 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
279 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
285 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
286 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
293 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b1
299 MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1
305 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
306 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
312 MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1
313 MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1
314 MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
315 MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
321 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
322 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
323 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
324 MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
330 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
336 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
337 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
338 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
339 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
340 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
341 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
343 MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x17071
345 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x17071
351 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170B9
352 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100B9
353 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170B9
354 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170B9
355 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170B9
356 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170B9
362 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170F9
363 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100F9
364 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170F9
365 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170F9
366 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170F9
367 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170F9
373 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
374 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
375 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
376 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
377 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
378 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
384 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
385 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
386 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
387 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
388 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
389 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
403 pinctrl-0 = <&pinctrl_pwm2>;
429 pinctrl-0 = <&pinctrl_uart1>;
435 pinctrl-0 = <&pinctrl_uart2 &pinctrl_bt>;
447 pinctrl-0 = <&pinctrl_uart3>;
459 pinctrl-0 = <&pinctrl_usbotg>;
466 pinctrl-0 = <&pinctrl_usdhc1>;
476 #size-cells = <0>;
490 pinctrl-0 = <&pinctrl_usdhc2>;
499 pinctrl-0 = <&pinctrl_usdhc3>;