Lines Matching +full:0 +full:x40013000

52 		reg = <0x10000000 0>;
63 pinctrl-0 = <&pinctrl_hummingboard2_gpio7_9>;
96 pinctrl-0 = <&pinctrl_hummingboard2_vmmc>;
110 pinctrl-0 = <&pinctrl_hummingboard2_usbotg_vbus>;
122 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
124 pinctrl-0 = <&pinctrl_hummingboard2_usbh1_vbus>;
138 pinctrl-0 = <&pinctrl_hummingboard2_usbh2_vbus>;
152 pinctrl-0 = <&pinctrl_hummingboard2_usbh3_vbus>;
188 fsl,audmux-port = <0>;
203 IMX_AUDMUX_V2_PDCR_RXDSEL(0)
210 pinctrl-0 = <&pinctrl_hummingboard2_ecspi2>;
217 pinctrl-0 = <&pinctrl_hummingboard2_hdmi>;
225 pinctrl-0 = <&pinctrl_hummingboard2_i2c1>;
230 reg = <0x68>;
236 #sound-dai-cells = <0>;
238 pinctrl-0 = <&pinctrl_hummingboard2_sgtl5000>;
239 reg = <0x0a>;
249 pinctrl-0 = <&pinctrl_hummingboard2_i2c2>;
256 pinctrl-0 = <&pinctrl_hummingboard2_i2c3>;
262 pinctrl-0 = <&pinctrl_hog>;
292 MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x400130b1
294 MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x400130b1
296 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x400130b1
298 MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x400130b1
300 MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x400130b1
302 MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x400130b1
304 MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x400130b1
306 MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x400130b1
308 MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x400130b1
310 MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x400130b1
312 MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x400130b1
314 MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x400130b1
316 MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x400130b1
318 MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x400130b1
320 MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x400130b1
322 MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x400130b1
324 MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x400130b1
326 MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x400130b1
328 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x400130b1
330 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x400130b1
332 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x400130b1
334 MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x400130b1
336 MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x400130b1
338 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x400130b1
340 MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x400130b1
342 MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x400130b1
344 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x400130b1
346 MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x400130b1
348 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x400130b1
350 MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x400130b1
352 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x400130b1
354 MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x400130b1
356 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x400130b1
359 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x400130b1
365 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
366 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
367 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
368 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1 /* CS */
374 MX6QDL_PAD_SD4_CMD__GPIO7_IO09 0x80000000
380 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
386 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
387 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
393 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
394 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
400 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
401 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
407 MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x4001b8b1
408 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x4001b8b1
409 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
415 MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b1
421 MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1
427 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
433 MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
434 MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
435 MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x110b0
436 MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
437 MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0
442 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
446 fsl,pins = <MX6QDL_PAD_SD4_DAT5__GPIO2_IO13 0x1b0b0>;
450 fsl,pins = <MX6QDL_PAD_SD4_CLK__GPIO7_IO10 0x1b0b0>;
457 fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
461 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
466 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071
467 MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071
473 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
474 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
475 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
476 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
477 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
478 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
484 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
485 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
486 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
487 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
488 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
489 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130b9
495 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9
496 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9
497 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
498 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
499 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
500 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130f9
506 MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
512 MX6QDL_PAD_EIM_D25__UART3_TX_DATA 0x1b0b1
513 MX6QDL_PAD_EIM_D24__UART3_RX_DATA 0x40013000
521 pinctrl-0 = <&pinctrl_hummingboard2_pcie_reset>;
528 pinctrl-0 = <&pinctrl_hummingboard2_pwm1>;
534 pinctrl-0 = <&pinctrl_hummingboard2_pwm3>;
550 pinctrl-0 = <&pinctrl_hummingboard2_usbotg_id>;
557 pinctrl-0 = <
576 pinctrl-0 = <&pinctrl_hummingboard2_uart3>;