Lines Matching +full:0 +full:x1b0b1
29 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
37 interrupts = <0>;
72 pinctrl-0 = <&pinctrl_gpio_leds>;
90 reg = <0x10000000 0x20000000>;
96 pinctrl-0 = <&pinctrl_pps>;
129 pinctrl-0 = <&pinctrl_enet>;
137 pinctrl-0 = <&pinctrl_gpmi_nand>;
149 pinctrl-0 = <&pinctrl_i2c1>;
154 reg = <0x20>;
159 #size-cells = <0>;
164 #size-cells = <0>;
166 channel@0 {
167 gw,mode = <0>;
168 reg = <0x00>;
174 reg = <0x02>;
180 reg = <0x05>;
186 reg = <0x08>;
192 reg = <0x0b>;
198 reg = <0xe>;
204 reg = <0x11>;
210 reg = <0x14>;
216 reg = <0x17>;
222 reg = <0x1d>;
228 reg = <0x20>;
234 reg = <0x23>;
242 reg = <0x23>;
251 reg = <0x50>;
257 reg = <0x51>;
263 reg = <0x52>;
269 reg = <0x53>;
275 reg = <0x68>;
282 pinctrl-0 = <&pinctrl_i2c2>;
289 pinctrl-0 = <&pinctrl_i2c3>;
294 reg = <0x20>;
301 reg = <0x48>;
303 #size-cells = <0>;
307 ti,gain = <0>;
313 ti,gain = <0>;
319 ti,gain = <0>;
327 pinctrl-0 = <&pinctrl_pcie>;
328 reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
334 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
340 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
346 pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
352 pinctrl-0 = <&pinctrl_uart1>;
358 pinctrl-0 = <&pinctrl_uart2>;
364 pinctrl-0 = <&pinctrl_uart3>;
370 pinctrl-0 = <&pinctrl_uart5>;
377 pinctrl-0 = <&pinctrl_usbotg>;
388 pinctrl-0 = <&pinctrl_wdog>;
395 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
396 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
397 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
398 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
399 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
400 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
401 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
402 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
403 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
404 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
405 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
406 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
407 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
408 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
409 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
410 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
411 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0
417 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
418 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
424 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
425 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
426 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
427 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
428 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
429 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
430 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
431 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
432 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
433 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
434 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
435 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
436 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
437 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
438 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
444 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
445 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
446 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
452 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
453 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
459 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
460 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
461 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
462 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
468 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
474 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
480 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
486 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
492 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
498 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
499 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
505 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
506 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
512 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
513 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
519 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
520 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
526 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
527 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
533 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0