Lines Matching +full:gpio +full:- +full:latch
1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015-2021 DH electronics GmbH
7 #include <dt-bindings/pwm/pwm.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/imx6qdl-clock.h>
10 #include <dt-bindings/input/input.h>
30 memory@10000000 { /* Appropriate memory size will be filled by U-Boot */
35 reg_3p3v: regulator-3P3V {
36 compatible = "regulator-fixed";
37 regulator-always-on;
38 regulator-min-microvolt = <3300000>;
39 regulator-max-microvolt = <3300000>;
40 regulator-name = "3P3V";
43 reg_eth_vio: regulator-eth-vio {
44 compatible = "regulator-fixed";
45 gpio = <&gpio1 7 0>;
46 pinctrl-0 = <&pinctrl_enet_vio>;
47 pinctrl-names = "default";
48 regulator-always-on;
49 regulator-boot-on;
50 regulator-min-microvolt = <3300000>;
51 regulator-max-microvolt = <3300000>;
52 regulator-name = "eth_vio";
53 vin-supply = <&sw2_reg>;
56 /* OE pin of the latch is low active */
57 reg_latch_oe_on: regulator-latch-oe-on {
58 compatible = "regulator-fixed";
59 gpio = <&gpio3 22 0>;
60 regulator-always-on;
61 regulator-name = "latch_oe_on";
64 reg_usb_h1_vbus: regulator-usb-h1-vbus {
65 compatible = "regulator-fixed";
66 enable-active-high;
67 gpio = <&gpio3 31 0>;
68 regulator-min-microvolt = <5000000>;
69 regulator-max-microvolt = <5000000>;
70 regulator-name = "usb_h1_vbus";
73 reg_usb_otg_vbus: regulator-usb-otg-vbus {
74 compatible = "regulator-fixed";
75 regulator-min-microvolt = <5000000>;
76 regulator-max-microvolt = <5000000>;
77 regulator-name = "usb_otg_vbus";
82 pinctrl-0 = <&pinctrl_flexcan1>;
83 pinctrl-names = "default";
95 pinctrl-0 = <&pinctrl_flexcan2>;
96 pinctrl-names = "default";
101 cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>, <&gpio4 11 GPIO_ACTIVE_LOW>;
102 pinctrl-0 = <&pinctrl_ecspi1>;
103 pinctrl-names = "default";
107 #address-cells = <1>;
108 #size-cells = <1>;
109 compatible = "jedec,spi-nor";
110 m25p,fast-read;
112 spi-max-frequency = <50000000>;
117 cs-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
118 pinctrl-0 = <&pinctrl_ecspi2>;
119 pinctrl-names = "default";
124 phy-mode = "rmii";
125 phy-handle = <ðphy0>;
126 pinctrl-0 = <&pinctrl_enet_100M>;
127 pinctrl-names = "default";
131 #address-cells = <1>;
132 #size-cells = <0>;
134 ethphy0: ethernet-phy@0 { /* SMSC LAN8710Ai */
135 compatible = "ethernet-phy-id0007.c0f0",
136 "ethernet-phy-ieee802.3-c22";
137 interrupt-parent = <&gpio4>;
139 pinctrl-0 = <&pinctrl_ethphy0>;
140 pinctrl-names = "default";
142 reset-assert-us = <500>;
143 reset-deassert-us = <500>;
144 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
145 smsc,disable-energy-detect; /* Make plugin detection reliable */
151 gpio-line-names =
152 "", "", "DHCOM-A", "", "DHCOM-B", "DHCOM-C", "", "",
154 "DHCOM-R", "DHCOM-S", "DHCOM-Q", "DHCOM-T", "DHCOM-U", "", "", "",
159 gpio-line-names =
162 "SOM-HW2", "", "", "SOM-HW0", "", "SOM-MEM1", "SOM-MEM0", "",
167 gpio-line-names =
171 "", "", "", "DHCOM-G", "", "", "", "";
175 gpio-line-names =
176 "", "", "", "", "", "DHCOM-E", "DHCOM-INT", "DHCOM-H",
177 "DHCOM-I", "DHCOM-L", "", "", "", "", "", "",
178 "", "", "", "", "DHCOM-F", "", "", "",
183 gpio-line-names =
186 "", "", "DHCOM-V", "DHCOM-W", "", "DHCOM-O", "", "",
191 gpio-line-names =
192 "", "", "", "DHCOM-D", "", "", "SOM-HW1", "",
193 "", "", "", "", "", "", "DHCOM-J", "DHCOM-K",
199 gpio-line-names =
200 "DHCOM-M", "DHCOM-N", "", "", "", "", "", "",
201 "", "", "", "", "", "DHCOM-P", "", "",
213 clock-frequency = <100000>;
214 pinctrl-0 = <&pinctrl_i2c1>;
215 pinctrl-1 = <&pinctrl_i2c1_gpio>;
216 pinctrl-names = "default", "gpio";
217 scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
218 sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
224 clock-frequency = <100000>;
225 pinctrl-0 = <&pinctrl_i2c2>;
226 pinctrl-1 = <&pinctrl_i2c2_gpio>;
227 pinctrl-names = "default", "gpio";
228 scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
229 sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
235 clock-frequency = <100000>;
236 pinctrl-0 = <&pinctrl_i2c3>;
237 pinctrl-1 = <&pinctrl_i2c3_gpio>;
238 pinctrl-names = "default", "gpio";
239 scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
240 sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
245 interrupt-parent = <&gpio5>;
247 pinctrl-0 = <&pinctrl_pmic>;
248 pinctrl-names = "default";
253 lltc,fb-voltage-divider = <100000 110000>;
254 regulator-always-on;
255 regulator-boot-on;
256 regulator-max-microvolt = <1527272>;
257 regulator-min-microvolt = <787500>;
258 regulator-ramp-delay = <7000>;
259 regulator-suspend-mem-microvolt = <1040000>;
263 lltc,fb-voltage-divider = <100000 28000>;
264 regulator-always-on;
265 regulator-boot-on;
266 regulator-max-microvolt = <3657142>;
267 regulator-min-microvolt = <1885714>;
268 regulator-ramp-delay = <7000>;
272 lltc,fb-voltage-divider = <100000 110000>;
273 regulator-always-on;
274 regulator-boot-on;
275 regulator-max-microvolt = <1527272>;
276 regulator-min-microvolt = <787500>;
277 regulator-ramp-delay = <7000>;
278 regulator-suspend-mem-microvolt = <980000>;
282 lltc,fb-voltage-divider = <100000 93100>;
283 regulator-always-on;
284 regulator-boot-on;
285 regulator-max-microvolt = <1659291>;
286 regulator-min-microvolt = <855571>;
287 regulator-ramp-delay = <7000>;
291 lltc,fb-voltage-divider = <102000 29400>;
292 regulator-always-on;
293 regulator-boot-on;
294 regulator-max-microvolt = <3240306>;
295 regulator-min-microvolt = <3240306>;
299 lltc,fb-voltage-divider = <100000 41200>;
300 regulator-always-on;
301 regulator-boot-on;
302 regulator-max-microvolt = <2484708>;
303 regulator-min-microvolt = <2484708>;
310 interrupts-extended = <&gpio4 14 IRQ_TYPE_EDGE_FALLING>;
311 pinctrl-0 = <&pinctrl_tsc2004>;
312 pinctrl-names = "default";
314 vio-supply = <®_3p3v>;
326 interrupt-parent = <&gpio7>;
328 pinctrl-0 = <&pinctrl_rtc>;
329 pinctrl-names = "default";
335 pinctrl-0 = <&pinctrl_pcie>;
336 pinctrl-names = "default";
340 pinctrl-0 = <&pinctrl_pwm1>;
341 pinctrl-names = "default";
345 vin-supply = <&sw3_reg>;
349 vin-supply = <&sw1_reg>;
353 vin-supply = <&sw1_reg>;
357 vin-supply = <&sw2_reg>;
361 vin-supply = <&sw2_reg>;
365 dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
366 dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
367 dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
368 rng-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
369 pinctrl-0 = <&pinctrl_uart1>;
370 pinctrl-names = "default";
371 uart-has-rtscts;
376 pinctrl-0 = <&pinctrl_uart4>;
377 pinctrl-names = "default";
382 pinctrl-0 = <&pinctrl_uart5>;
383 pinctrl-names = "default";
384 uart-has-rtscts;
390 pinctrl-0 = <&pinctrl_usbh1>;
391 pinctrl-names = "default";
392 vbus-supply = <®_usb_h1_vbus>;
397 disable-over-current;
399 pinctrl-0 = <&pinctrl_usbotg>;
400 pinctrl-names = "default";
401 vbus-supply = <®_usb_otg_vbus>;
406 cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
407 keep-power-in-suspend;
408 pinctrl-0 = <&pinctrl_usdhc2>;
409 pinctrl-names = "default";
414 cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
415 fsl,wp-controller;
416 keep-power-in-suspend;
417 pinctrl-0 = <&pinctrl_usdhc3>;
418 pinctrl-names = "default";
423 bus-width = <8>;
424 keep-power-in-suspend;
425 no-1-8-v;
426 non-removable;
427 pinctrl-0 = <&pinctrl_usdhc4>;
428 pinctrl-names = "default";
433 #address-cells = <2>;
434 #size-cells = <1>;
435 fsl,weim-cs-gpr = <&gpr>;
436 pinctrl-0 = <&pinctrl_weim &pinctrl_weim_cs0 &pinctrl_weim_cs1>;
437 pinctrl-names = "default";
445 pinctrl-0 = <
456 pinctrl-names = "default";
458 pinctrl_hog_base: hog-base-grp {
471 pinctrl_dhcom_a: dhcom-a-grp {
475 pinctrl_dhcom_b: dhcom-b-grp {
479 pinctrl_dhcom_c: dhcom-c-grp {
483 pinctrl_dhcom_d: dhcom-d-grp {
487 pinctrl_dhcom_e: dhcom-e-grp {
491 pinctrl_dhcom_f: dhcom-f-grp {
495 pinctrl_dhcom_g: dhcom-g-grp {
499 pinctrl_dhcom_h: dhcom-h-grp {
503 pinctrl_dhcom_i: dhcom-i-grp {
507 pinctrl_dhcom_j: dhcom-j-grp {
511 pinctrl_dhcom_k: dhcom-k-grp {
515 pinctrl_dhcom_l: dhcom-l-grp {
519 pinctrl_dhcom_m: dhcom-m-grp {
523 pinctrl_dhcom_n: dhcom-n-grp {
527 pinctrl_dhcom_o: dhcom-o-grp {
531 pinctrl_dhcom_p: dhcom-p-grp {
535 pinctrl_dhcom_q: dhcom-q-grp {
539 pinctrl_dhcom_r: dhcom-r-grp {
543 pinctrl_dhcom_s: dhcom-s-grp {
547 pinctrl_dhcom_t: dhcom-t-grp {
551 pinctrl_dhcom_u: dhcom-u-grp {
555 pinctrl_dhcom_v: dhcom-v-grp {
559 pinctrl_dhcom_w: dhcom-w-grp {
563 pinctrl_dhcom_int: dhcom-int-grp {
567 pinctrl_ecspi1: ecspi1-grp {
577 pinctrl_ecspi2: ecspi2-grp {
586 pinctrl_enet_100M: enet-100M-grp {
601 pinctrl_enet_vio: enet-vio-grp {
607 pinctrl_ethphy0: ethphy0-grp {
614 pinctrl_flexcan1: flexcan1-grp {
621 pinctrl_flexcan2: flexcan2-grp {
628 pinctrl_i2c1: i2c1-grp {
635 pinctrl_i2c1_gpio: i2c1-gpio-grp {
642 pinctrl_i2c2: i2c2-grp {
649 pinctrl_i2c2_gpio: i2c2-gpio-grp {
656 pinctrl_i2c3: i2c3-grp {
663 pinctrl_i2c3_gpio: i2c3-gpio-grp {
670 pinctrl_ipu1_lcdif: ipu1-lcdif-grp {
703 pinctrl_pcie: pcie-grp {
709 pinctrl_pmic: pmic-grp {
715 pinctrl_pwm1: pwm1-grp {
721 pinctrl_rtc: rtc-grp {
727 pinctrl_tsc2004: tsc2004-grp {
733 pinctrl_uart1: uart1-grp {
746 pinctrl_uart4: uart4-grp {
753 pinctrl_uart5: uart5-grp {
762 pinctrl_usbh1: usbh1-grp {
769 pinctrl_usbotg: usbotg-grp {
775 pinctrl_usdhc2: usdhc2-grp {
787 pinctrl_usdhc3: usdhc3-grp {
799 pinctrl_usdhc4: usdhc4-grp {
814 pinctrl_weim: weim-grp {
839 pinctrl_weim_cs0: weim-cs0-grp {
845 pinctrl_weim_cs1: weim-cs1-grp {