Lines Matching +full:0 +full:x130b0
28 reg = <0x10000000 0x80000000>;
34 pinctrl-0 = <&pinctrl_gpio_fan>;
36 gpio-fan,speed-map = <0 0
44 pinctrl-0 = <&pinctrl_ir>;
50 pinctrl-0 = <&pinctrl_gpio_leds>;
95 #sound-dai-cells = <0>;
112 pinctrl-0 = <&pinctrl_enet>;
119 #size-cells = <0>;
132 pinctrl-0 = <&pinctrl_hdmi>;
140 pinctrl-0 = <&pinctrl_i2c1>;
147 pinctrl-0 = <&pinctrl_sgtl5000>;
148 reg = <0x0a>;
149 #sound-dai-cells = <0>;
158 pinctrl-0 = <&pinctrl_i2c2>;
165 pinctrl-0 = <&pinctrl_i2c3>;
170 reg = <0x68>;
176 pinctrl-0 = <&pinctrl_pcie>;
195 pinctrl-0 = <&pinctrl_spdif>;
205 pinctrl-0 = <&pinctrl_uart1>;
211 pinctrl-0 = <&pinctrl_uart2>;
223 pinctrl-0 = <&pinctrl_usbotg>;
230 pinctrl-0 = <&pinctrl_usdhc2>;
242 pinctrl-0 = <&pinctrl_usdhc3>;
244 cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
255 pinctrl-0 = <&pinctrl_usdhc4>;
268 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
269 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
270 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
271 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
272 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
273 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
274 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
275 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
276 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
277 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
278 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
279 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
280 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
281 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
282 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
283 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
284 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b059
290 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x130b1
296 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b1
302 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
308 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
309 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
315 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
316 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
322 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
323 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
329 MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x17059
335 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x17059
341 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
342 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
343 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
344 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
345 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
350 fsl,pins = <MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x13091
356 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
357 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
363 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
364 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
370 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
376 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
377 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
378 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
379 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
380 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
381 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
382 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x17059
388 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
389 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
390 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
391 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
392 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
393 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
394 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x17059
395 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x17059
401 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
402 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
403 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
404 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
405 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
406 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
407 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
408 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
409 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
410 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059