Lines Matching +full:0 +full:x130b0
52 reg = <0x10000000 0x40000000>;
58 pinctrl-0 = <&pinctrl_backlight>;
59 pwms = <&pwm2 0 5000000 0>;
60 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
98 pinctrl-0 = <&pinctrl_reg_lvds>;
107 pinctrl-0 = <&pinctrl_usbh1_vbus>;
147 pinctrl-0 = <&pinctrl_audmux>;
181 pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs &pinctrl_ecspi2_flwp>;
184 s25fl256s: flash@0 {
189 reg = <0>;
191 partition@0 {
193 reg = <0x0 0x20000>;
198 reg = <0x20000 0x100000>;
203 reg = <0x120000 0x10000>;
207 reg = <0x130000 0x10000>;
211 reg = <0x140000 0x800000>;
215 reg = <0x940000 0x400000>;
219 reg = <0xD40000 0x800000>;
227 pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs &pinctrl_ecspi3_flwp>;
233 pinctrl-0 = <&pinctrl_enet>;
240 #size-cells = <0>;
241 ethernet_phy0: ethernet-phy@0 {
246 marvell,reg-init = <3 0x10 0 0x1011>;
248 reg = <0>;
256 pinctrl-0 = <&pinctrl_i2c1>;
260 #sound-dai-cells = <0>;
262 reg = <0x6C>;
269 pinctrl-0 = <&pinctrl_i2c2>;
276 pinctrl-0 = <&pinctrl_i2c3>;
282 reg = <0x50>;
287 reg = <0x08>;
388 lvds0: lvds-channel@0 {
403 pinctrl-0 = <&pinctrl_pwm2>;
413 pinctrl-0 = <&pinctrl_uart4>;
420 pinctrl-0 = <&pinctrl_uart5>;
426 pinctrl-0 = <&pinctrl_usbh1>;
432 pinctrl-0 = <&pinctrl_usdhc4>;
442 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x130b0
443 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x130b0
444 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x130b0
445 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x130b0
452 MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x1b0b0
458 MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x100b1
459 MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x100b1
460 MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x100b1
466 MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x100b1
472 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
478 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
479 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
480 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
486 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x1b0b0
492 MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27 0x1b0b0
498 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
499 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
500 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
501 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
502 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
503 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
504 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
505 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
506 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
507 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
508 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
509 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
510 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
511 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
512 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
513 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
514 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
515 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0
521 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
522 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
528 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
529 MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
535 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
536 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
542 MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1
549 MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b0
555 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
556 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
557 MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
558 MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
564 MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1
565 MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1
571 MX6QDL_PAD_EIM_D30__USB_H1_OC 0x030b0
577 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0
583 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
584 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
585 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
586 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
587 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
588 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
589 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
590 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
591 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
592 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
593 MX6QDL_PAD_NANDF_ALE__SD4_RESET 0x17059