Lines Matching +full:imx6q +full:- +full:iomuxc

1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6dl-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
22 next-level-cache = <&L2>;
23 operating-points = <
29 fsl,soc-operating-points = <
30 /* ARM kHz SOC-PU uV */
35 clock-latency = <61036>; /* two CLK32 periods */
36 #cooling-cells = <2>;
42 clock-names = "arm", "pll2_pfd2_396m", "step",
44 arm-supply = <&reg_arm>;
45 pu-supply = <&reg_pu>;
46 soc-supply = <&reg_soc>;
47 nvmem-cells = <&cpu_speed_grade>;
48 nvmem-cell-names = "speed_grade";
52 compatible = "arm,cortex-a9";
55 next-level-cache = <&L2>;
56 operating-points = <
62 fsl,soc-operating-points = <
63 /* ARM kHz SOC-PU uV */
68 clock-latency = <61036>; /* two CLK32 periods */
69 #cooling-cells = <2>;
75 clock-names = "arm", "pll2_pfd2_396m", "step",
77 arm-supply = <&reg_arm>;
78 pu-supply = <&reg_pu>;
79 soc-supply = <&reg_soc>;
85 compatible = "mmio-sram";
88 #address-cells = <1>;
89 #size-cells = <1>;
107 #address-cells = <1>;
108 #size-cells = <0>;
109 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
118 capture-subsystem {
119 compatible = "fsl,imx-capture-subsystem";
123 display-subsystem {
124 compatible = "fsl,imx-display-subsystem";
130 gpio-ranges = <&iomuxc 0 131 2>, <&iomuxc 2 137 8>, <&iomuxc 10 189 2>,
131 <&iomuxc 12 194 1>, <&iomuxc 13 193 1>, <&iomuxc 14 192 1>,
132 <&iomuxc 15 191 1>, <&iomuxc 16 185 2>, <&iomuxc 18 184 1>,
133 <&iomuxc 19 187 1>, <&iomuxc 20 183 1>, <&iomuxc 21 188 1>,
134 <&iomuxc 22 123 3>, <&iomuxc 25 121 1>, <&iomuxc 26 127 1>,
135 <&iomuxc 27 126 1>, <&iomuxc 28 128 1>, <&iomuxc 29 130 1>,
136 <&iomuxc 30 129 1>, <&iomuxc 31 122 1>;
140 gpio-ranges = <&iomuxc 0 161 8>, <&iomuxc 8 208 8>, <&iomuxc 16 74 1>,
141 <&iomuxc 17 73 1>, <&iomuxc 18 72 1>, <&iomuxc 19 71 1>,
142 <&iomuxc 20 70 1>, <&iomuxc 21 69 1>, <&iomuxc 22 68 1>,
143 <&iomuxc 23 79 2>, <&iomuxc 25 118 2>, <&iomuxc 27 117 1>,
144 <&iomuxc 28 113 4>;
148 gpio-ranges = <&iomuxc 0 97 2>, <&iomuxc 2 105 8>, <&iomuxc 10 99 6>,
149 <&iomuxc 16 81 16>;
153 gpio-ranges = <&iomuxc 5 136 1>, <&iomuxc 6 145 1>, <&iomuxc 7 150 1>,
154 <&iomuxc 8 146 1>, <&iomuxc 9 151 1>, <&iomuxc 10 147 1>,
155 <&iomuxc 11 152 1>, <&iomuxc 12 148 1>, <&iomuxc 13 153 1>,
156 <&iomuxc 14 149 1>, <&iomuxc 15 154 1>, <&iomuxc 16 39 7>,
157 <&iomuxc 23 56 1>, <&iomuxc 24 61 7>, <&iomuxc 31 46 1>;
161 gpio-ranges = <&iomuxc 0 120 1>, <&iomuxc 2 77 1>, <&iomuxc 4 76 1>,
162 <&iomuxc 5 47 9>, <&iomuxc 14 57 4>, <&iomuxc 18 37 1>,
163 <&iomuxc 19 36 1>, <&iomuxc 20 35 1>, <&iomuxc 21 38 1>,
164 <&iomuxc 22 29 6>, <&iomuxc 28 19 4>;
168 gpio-ranges = <&iomuxc 0 23 6>, <&iomuxc 6 75 1>, <&iomuxc 7 156 1>,
169 <&iomuxc 8 155 1>, <&iomuxc 9 170 1>, <&iomuxc 10 169 1>,
170 <&iomuxc 11 157 1>, <&iomuxc 14 158 3>, <&iomuxc 17 204 1>,
171 <&iomuxc 18 203 1>, <&iomuxc 19 182 1>, <&iomuxc 20 177 4>,
172 <&iomuxc 24 175 1>, <&iomuxc 25 171 1>, <&iomuxc 26 181 1>,
173 <&iomuxc 27 172 3>, <&iomuxc 30 176 1>, <&iomuxc 31 78 1>;
177 gpio-ranges = <&iomuxc 0 202 1>, <&iomuxc 1 201 1>, <&iomuxc 2 196 1>,
178 <&iomuxc 3 195 1>, <&iomuxc 4 197 4>, <&iomuxc 8 205 1>,
179 <&iomuxc 9 207 1>, <&iomuxc 10 206 1>, <&iomuxc 11 133 3>;
184 compatible = "video-mux";
185 mux-controls = <&mux 0>;
186 #address-cells = <1>;
187 #size-cells = <0>;
193 remote-endpoint = <&mipi_vc0_to_ipu1_csi0_mux>;
201 remote-endpoint = <&mipi_vc1_to_ipu1_csi0_mux>;
209 remote-endpoint = <&mipi_vc2_to_ipu1_csi0_mux>;
217 remote-endpoint = <&mipi_vc3_to_ipu1_csi0_mux>;
232 remote-endpoint = <&ipu1_csi0_from_ipu1_csi0_mux>;
238 compatible = "video-mux";
239 mux-controls = <&mux 1>;
240 #address-cells = <1>;
241 #size-cells = <0>;
247 remote-endpoint = <&mipi_vc0_to_ipu1_csi1_mux>;
255 remote-endpoint = <&mipi_vc1_to_ipu1_csi1_mux>;
263 remote-endpoint = <&mipi_vc2_to_ipu1_csi1_mux>;
271 remote-endpoint = <&mipi_vc3_to_ipu1_csi1_mux>;
286 remote-endpoint = <&ipu1_csi1_from_ipu1_csi1_mux>;
293 compatible = "fsl,imx6dl-gpt";
297 compatible = "fsl,imx6dl-hdmi";
300 &iomuxc {
301 compatible = "fsl,imx6dl-iomuxc";
306 remote-endpoint = <&ipu1_csi1_mux_to_ipu1_csi1>;
314 clock-names = "di0_pll", "di1_pll",
322 #address-cells = <1>;
323 #size-cells = <0>;
327 remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc0>;
332 remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc0>;
338 #address-cells = <1>;
339 #size-cells = <0>;
343 remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc1>;
348 remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc1>;
354 #address-cells = <1>;
355 #size-cells = <0>;
359 remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc2>;
364 remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc2>;
370 #address-cells = <1>;
371 #size-cells = <0>;
375 remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc3>;
380 remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc3>;
386 mux-reg-masks = <0x34 0x00000007>, /* IPU_CSI0_MUX */
396 compatible = "fsl,imx6dl-vpu", "cnm,coda960";