Lines Matching +full:0 +full:xe1
53 reg = <0x10000000 0x40000000>;
58 #size-cells = <0>;
62 pinctrl-0 = <&pinctrl_ipu_disp>;
64 port@0 {
65 reg = <0>;
81 lcd_panel: display@0 {
84 reg = <0>;
114 reg = <0x4b>;
127 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x31
128 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0xE1
129 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
130 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
131 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0xE1
132 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0xE1
133 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0xE1
134 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0xE1
135 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0xE1
136 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0xE1
137 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0xE1
138 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0xE1
139 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0xE1
140 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0xE1
141 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0xE1
142 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0xE1
143 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0xE1
144 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0xE1
145 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0xe1
146 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0xE1
147 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0xE1
148 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0xE1
149 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0xE1
150 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0xE1
151 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0xE1
152 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0xE1
153 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0xE1
154 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0xE1