Lines Matching +full:0 +full:x185

17 			#clock-cells = <0>;
25 pinctrl-0 = <&pinctrl_gpiokeys_1>;
39 pinctrl-0 = <&pinctrl_gpioled>;
71 #phy-cells = <0>;
77 pinctrl-0 = <&pinctrl_audmux>;
83 pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>;
84 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
90 pinctrl-0 = <&pinctrl_ecspi1>;
94 can0: can@0 {
96 pinctrl-0 = <&pinctrl_can>;
98 reg = <0>;
110 reg = <0x1a>;
118 MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0x80000000
119 MX51_PAD_AUD3_BB_RXD__AUD3_RXD 0x80000000
120 MX51_PAD_AUD3_BB_CK__AUD3_TXC 0x80000000
121 MX51_PAD_AUD3_BB_FS__AUD3_TXFS 0x80000000
128 MX51_PAD_CSI2_PIXCLK__GPIO4_15 0x80000000 /* nReset */
129 MX51_PAD_GPIO1_1__GPIO1_1 0x80000000 /* IRQ */
135 MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
136 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
137 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
138 MX51_PAD_CSPI1_SS0__GPIO4_24 0x80000000 /* CS0 */
144 MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
145 MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
146 MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
147 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
148 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
149 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
155 MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
156 MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
162 MX51_PAD_UART3_RXD__UART3_RXD 0x1c5
163 MX51_PAD_UART3_TXD__UART3_TXD 0x1c5
169 MX51_PAD_KEY_COL4__UART3_RTS 0x1c5
170 MX51_PAD_KEY_COL5__UART3_CTS 0x1c5
176 MX51_PAD_DI1_D1_CS__GPIO3_4 0x1f5
182 MX51_PAD_GPIO1_0__GPIO1_0 0xd5
188 MX51_PAD_NANDF_D9__GPIO3_31 0x1f5
194 MX51_PAD_NANDF_D10__GPIO3_30 0x80000000
200 MX51_PAD_CSI1_D9__GPIO3_13 0x1f5
206 MX51_PAD_USBH1_CLK__USBH1_CLK 0x1e5
207 MX51_PAD_USBH1_DIR__USBH1_DIR 0x1e5
208 MX51_PAD_USBH1_NXT__USBH1_NXT 0x1e5
209 MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5
210 MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5
211 MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5
212 MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5
213 MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5
214 MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5
215 MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5
216 MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5
217 MX51_PAD_USBH1_STP__USBH1_STP 0x1e5
223 MX51_PAD_EIM_CS3__GPIO2_28 0x1f5
236 pinctrl-0 = <&pinctrl_uart1>;
243 pinctrl-0 = <&pinctrl_uart3 &pinctrl_uart3_rtscts>;
250 pinctrl-0 = <&pinctrl_usbh1>;
265 pinctrl-0 = <&pinctrl_usbh1_vbus>;