Lines Matching +full:0 +full:x185
15 pinctrl-0 = <&pinctrl_backlight>;
25 pinctrl-0 = <&pinctrl_ipu_disp1>;
42 pixelclk-active = <0>;
76 pinctrl-0 = <&pinctrl_ecspi1>;
84 pinctrl-0 = <&pinctrl_ecspi2>;
92 pinctrl-0 = <&pinctrl_esdhc1>;
100 pinctrl-0 = <&pinctrl_esdhc2>;
108 pinctrl-0 = <&pinctrl_i2c2>;
114 pinctrl-0 = <&pinctrl_hog>;
119 MX51_PAD_DI1_D1_CS__GPIO3_4 0x1F5
125 MX51_PAD_EIM_EB2__GPIO2_22 0x0C5
126 MX51_PAD_EIM_EB3__GPIO2_23 0x0C5
127 MX51_PAD_EIM_CS4__GPIO2_29 0x100
128 MX51_PAD_NANDF_D13__GPIO3_27 0x0C5
129 MX51_PAD_NANDF_D12__GPIO3_28 0x0C5
130 MX51_PAD_CSPI1_SS0__GPIO4_24 0x0C5
131 MX51_PAD_CSPI1_SS1__GPIO4_25 0x0C5
132 MX51_PAD_GPIO1_2__GPIO1_2 0x0C5
133 MX51_PAD_GPIO1_3__GPIO1_3 0x0C5
139 MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
140 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
141 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
147 MX51_PAD_NANDF_RB3__ECSPI2_MISO 0x185
148 MX51_PAD_NANDF_D15__ECSPI2_MOSI 0x185
149 MX51_PAD_NANDF_RB2__ECSPI2_SCLK 0x185
155 MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
156 MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
157 MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
158 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
159 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
160 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
166 MX51_PAD_SD2_CMD__SD2_CMD 0x400020d5
167 MX51_PAD_SD2_CLK__SD2_CLK 0x20d5
168 MX51_PAD_SD2_DATA0__SD2_DATA0 0x20d5
169 MX51_PAD_SD2_DATA1__SD2_DATA1 0x20d5
170 MX51_PAD_SD2_DATA2__SD2_DATA2 0x20d5
171 MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5
177 MX51_PAD_EIM_D27__I2C2_SCL 0x400001ed
178 MX51_PAD_EIM_D24__I2C2_SDA 0x400001ed
184 MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
185 MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
186 MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
187 MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
188 MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
189 MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5
190 MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5
191 MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5
192 MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5
193 MX51_PAD_DISP1_DAT9__DISP1_DAT9 0x5
194 MX51_PAD_DISP1_DAT10__DISP1_DAT10 0x5
195 MX51_PAD_DISP1_DAT11__DISP1_DAT11 0x5
196 MX51_PAD_DISP1_DAT12__DISP1_DAT12 0x5
197 MX51_PAD_DISP1_DAT13__DISP1_DAT13 0x5
198 MX51_PAD_DISP1_DAT14__DISP1_DAT14 0x5
199 MX51_PAD_DISP1_DAT15__DISP1_DAT15 0x5
200 MX51_PAD_DISP1_DAT16__DISP1_DAT16 0x5
201 MX51_PAD_DISP1_DAT17__DISP1_DAT17 0x5
202 MX51_PAD_DISP1_DAT18__DISP1_DAT18 0x5
203 MX51_PAD_DISP1_DAT19__DISP1_DAT19 0x5
204 MX51_PAD_DISP1_DAT20__DISP1_DAT20 0x5
205 MX51_PAD_DISP1_DAT21__DISP1_DAT21 0x5
206 MX51_PAD_DISP1_DAT22__DISP1_DAT22 0x5
207 MX51_PAD_DISP1_DAT23__DISP1_DAT23 0x5
208 MX51_PAD_DI1_PIN2__DI1_PIN2 0x5
209 MX51_PAD_DI1_PIN3__DI1_PIN3 0x5