Lines Matching +full:tegra30 +full:- +full:hda
1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra30.dtsi"
15 avdd-pexa-supply = <&vdd2_reg>;
16 avdd-pexb-supply = <&vdd2_reg>;
17 avdd-pex-pll-supply = <&vdd2_reg>;
18 avdd-plle-supply = <&ldo6_reg>;
19 hvdd-pex-supply = <®_module_3v3>;
20 vddio-pex-ctl-supply = <®_module_3v3>;
21 vdd-pexa-supply = <&vdd2_reg>;
22 vdd-pexb-supply = <&vdd2_reg>;
26 nvidia,num-lanes = <4>;
31 nvidia,num-lanes = <1>;
34 /* I210/I211 Gigabit Ethernet Controller (on-module) */
37 nvidia,num-lanes = <1>;
41 local-mac-address = [00 00 00 00 00 00];
48 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
49 nvidia,hpd-gpio =
51 pll-supply = <®_1v8_avdd_hdmi_pll>;
52 vdd-supply = <®_3v3_avdd_hdmi>;
57 pinctrl-names = "default";
58 pinctrl-0 = <&state_default>;
61 /* Analogue Audio (On-module) */
62 clk1-out-pw4 {
67 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
69 dap3-fs-pp0 {
85 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
89 uart3-rts-n-pc0 {
94 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
97 uart3-cts-n-pa1 {
102 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
106 spi2-cs0-n-px3 {
116 spi2-cs1-n-pw2 {
121 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
125 gmi-a16-pj7 {
133 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
136 spi2-cs2-n-pw3 {
141 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
145 clk1-req-pee2 {
147 nvidia,function = "hda";
151 clk2-out-pw5 {
156 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
158 dap1-fs-pn0 {
163 nvidia,function = "hda";
169 kb-col0-pq0 {
181 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
189 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
193 hdmi-cec-pee3 {
198 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
199 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
201 hdmi-int-pn7 {
206 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
210 gen1-i2c-scl-pc4 {
216 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
217 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
221 ddc-scl-pv4 {
227 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
231 cam-i2c-scl-pbb1 {
237 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
238 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
242 lcd-d0-pe0 {
274 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
278 sdmmc3-clk-pa6 {
284 sdmmc3-dat0-pb7 {
304 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
308 cam-mclk-pcc0 {
313 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
315 vi-vsync-pd6 {
334 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
337 kb-col2-pq2 {
345 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
347 kb-row0-pr0 {
355 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
357 kb-row5-pr5 {
364 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
367 * VI level-shifter direction
368 * (pull-down => default direction input)
370 vi-mclk-pt1 {
375 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
411 gmi-rst-n-pi4 {
419 pex-l0-prsnt-n-pdd0 {
424 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
428 sdmmc1-clk-pz0 {
434 sdmmc1-cmd-pz1 {
445 clk2-req-pcc5 {
450 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
454 spdif-out-pk5 {
460 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
464 spi1-sck-px5 {
475 lcd-sck-pz4 {
486 * Apalis TS (Low-speed type specific)
489 kb-col5-pq5 {
494 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
496 kb-col6-pq6 {
504 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
508 ulpi-data0 {
523 ulpi-clk-py0 {
534 uart2-rxd-pc3 {
543 uart3-rxd-pw7 {
552 pex-l0-rst-n-pdd1 {
557 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
561 pex-l0-clkreq-n-pdd2 {
566 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
570 gen2-i2c-scl-pt5 {
573 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
579 gen2-i2c-sda-pt6 {
582 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
585 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
589 crt-hsync-pv6 {
595 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
604 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
607 /* eMMC (On-module) */
608 sdmmc4-clk-pcc4 {
615 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
617 sdmmc4-dat0-paa0 {
629 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
632 /* LAN i210/i211 DEV_OFF_N, PE_RST_N (On-module) */
633 pex-l2-prsnt-n-pdd7 {
639 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
641 /* LAN i210/i211 PE_WAKE_N, SDP3 (On-module) */
642 pex-wake-n-pdd3 {
648 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
650 /* LAN i210/i211 SMB_ALERT_N (On-module) */
651 sys-clk-req-pz5 {
656 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
668 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
678 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
682 clk-32k-out-pa0 {
693 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
695 dap2-fs-pa2 {
709 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
711 gmi-ad0-pg0 {
743 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
745 gmi-cs0-n-pj0 {
752 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
754 gmi-cs6-n-pi3 {
759 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
761 gmi-cs7-n-pi6 {
766 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
768 lcd-pwr0-pb2 {
775 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
777 uart2-cts-n-pj5 {
783 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
786 /* Power I2C (On-module) */
787 pwr-i2c-scl-pz6 {
793 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
794 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
802 lcd-dc1-pd2 {
807 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
810 /* TOUCH_PEN_INT# (On-module) */
816 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
822 compatible = "nvidia,tegra30-hsuart";
823 reset-names = "serial";
824 /delete-property/ reg-shift;
828 compatible = "nvidia,tegra30-hsuart";
829 reset-names = "serial";
830 /delete-property/ reg-shift;
834 compatible = "nvidia,tegra30-hsuart";
835 reset-names = "serial";
836 /delete-property/ reg-shift;
840 clock-frequency = <10000>;
849 clock-frequency = <100000>;
855 #sound-dai-cells = <0>;
856 VDDA-supply = <®_module_3v3_audio>;
857 VDDD-supply = <®_1v8_vio>;
858 VDDIO-supply = <®_module_3v3>;
867 #interrupt-cells = <2>;
868 interrupt-controller;
869 wakeup-source;
871 ti,system-power-controller;
873 #gpio-cells = <2>;
874 gpio-controller;
876 vcc1-supply = <®_module_3v3>;
877 vcc2-supply = <®_module_3v3>;
878 vcc3-supply = <®_1v8_vio>;
879 vcc4-supply = <®_module_3v3>;
880 vcc5-supply = <®_module_3v3>;
881 vcc6-supply = <®_1v8_vio>;
882 vcc7-supply = <®_5v0_charge_pump>;
883 vccio-supply = <®_module_3v3>;
887 regulator-name = "+V1.35_VDDIO_DDR";
888 regulator-min-microvolt = <1350000>;
889 regulator-max-microvolt = <1350000>;
890 regulator-always-on;
894 regulator-name = "+V1.05";
895 regulator-min-microvolt = <1050000>;
896 regulator-max-microvolt = <1050000>;
900 regulator-name = "+V1.0_VDD_CPU";
901 regulator-min-microvolt = <1150000>;
902 regulator-max-microvolt = <1150000>;
903 regulator-always-on;
907 regulator-name = "+V1.8";
908 regulator-min-microvolt = <1800000>;
909 regulator-max-microvolt = <1800000>;
910 regulator-always-on;
921 regulator-name = "EN_+V3.3";
922 regulator-min-microvolt = <3300000>;
923 regulator-max-microvolt = <3300000>;
924 regulator-always-on;
928 regulator-name = "+V1.2_CSI";
929 regulator-min-microvolt = <1200000>;
930 regulator-max-microvolt = <1200000>;
934 regulator-name = "+V1.2_VDD_RTC";
935 regulator-min-microvolt = <1200000>;
936 regulator-max-microvolt = <1200000>;
937 regulator-always-on;
945 regulator-name = "+V2.8_AVDD_VDAC";
946 regulator-min-microvolt = <2800000>;
947 regulator-max-microvolt = <2800000>;
948 regulator-always-on;
957 regulator-name = "+V1.05_AVDD_PLLE";
958 regulator-min-microvolt = <1100000>;
959 regulator-max-microvolt = <1100000>;
963 regulator-name = "+V1.2_AVDD_PLL";
964 regulator-min-microvolt = <1200000>;
965 regulator-max-microvolt = <1200000>;
966 regulator-always-on;
970 regulator-name = "+V1.0_VDD_DDR_HS";
971 regulator-min-microvolt = <1000000>;
972 regulator-max-microvolt = <1000000>;
973 regulator-always-on;
982 irq-gpio = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
985 irq-trigger = <0x1>;
987 st,adc-freq = <1>;
988 /* 12-bit ADC */
989 st,mod-12b = <1>;
991 st,ref-sel = <0>;
993 st,sample-time = <4>;
996 compatible = "st,stmpe-adc";
997 /* forbid to use ADC channels 3-0 (touch) */
998 st,norequest-mask = <0x0F>;
1002 compatible = "st,stmpe-ts";
1004 st,ave-ctrl = <3>;
1006 st,fraction-z = <7>;
1011 st,i-drive = <1>;
1015 st,touch-det-delay = <5>;
1023 temp-sensor@4c {
1033 regulator-name = "tps62362-vout";
1034 regulator-min-microvolt = <900000>;
1035 regulator-max-microvolt = <1400000>;
1036 regulator-boot-on;
1037 regulator-always-on;
1044 spi-max-frequency = <10000000>;
1050 interrupt-parent = <&gpio>;
1052 spi-max-frequency = <10000000>;
1059 spi-max-frequency = <10000000>;
1065 interrupt-parent = <&gpio>;
1067 spi-max-frequency = <10000000>;
1072 nvidia,invert-interrupt;
1073 nvidia,suspend-mode = <1>;
1074 nvidia,cpu-pwr-good-time = <5000>;
1075 nvidia,cpu-pwr-off-time = <5000>;
1076 nvidia,core-pwr-good-time = <3845 3845>;
1077 nvidia,core-pwr-off-time = <0>;
1078 nvidia,core-power-req-active-high;
1079 nvidia,sys-clock-req-active-high;
1082 i2c-thermtrip {
1083 nvidia,i2c-controller-id = <4>;
1084 nvidia,bus-addr = <0x2d>;
1085 nvidia,reg-addr = <0x3f>;
1086 nvidia,reg-data = <0x1>;
1090 hda@70030000 {
1103 bus-width = <8>;
1104 non-removable;
1105 vmmc-supply = <®_module_3v3>; /* VCC */
1106 vqmmc-supply = <®_1v8_vio>; /* VCCQ */
1107 mmc-ddr-1_8v;
1110 clk16m: clock-osc4 {
1111 compatible = "fixed-clock";
1112 #clock-cells = <0>;
1113 clock-frequency = <16000000>;
1116 clk32k_in: clock-xtal1 {
1117 compatible = "fixed-clock";
1118 #clock-cells = <0>;
1119 clock-frequency = <32768>;
1122 reg_1v8_avdd_hdmi_pll: regulator-1v8-avdd-hdmi-pll {
1123 compatible = "regulator-fixed";
1124 regulator-name = "+V1.8_AVDD_HDMI_PLL";
1125 regulator-min-microvolt = <1800000>;
1126 regulator-max-microvolt = <1800000>;
1127 enable-active-high;
1129 vin-supply = <®_1v8_vio>;
1132 reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
1133 compatible = "regulator-fixed";
1134 regulator-name = "+V3.3_AVDD_HDMI";
1135 regulator-min-microvolt = <3300000>;
1136 regulator-max-microvolt = <3300000>;
1137 enable-active-high;
1139 vin-supply = <®_module_3v3>;
1142 reg_5v0_charge_pump: regulator-5v0-charge-pump {
1143 compatible = "regulator-fixed";
1144 regulator-name = "+V5.0";
1145 regulator-min-microvolt = <5000000>;
1146 regulator-max-microvolt = <5000000>;
1147 regulator-always-on;
1150 reg_module_3v3: regulator-module-3v3 {
1151 compatible = "regulator-fixed";
1152 regulator-name = "+V3.3";
1153 regulator-min-microvolt = <3300000>;
1154 regulator-max-microvolt = <3300000>;
1155 regulator-always-on;
1158 reg_module_3v3_audio: regulator-module-3v3-audio {
1159 compatible = "regulator-fixed";
1160 regulator-name = "+V3.3_AUDIO_AVDD_S";
1161 regulator-min-microvolt = <3300000>;
1162 regulator-max-microvolt = <3300000>;
1163 regulator-always-on;
1167 compatible = "toradex,tegra-audio-sgtl5000-apalis_t30",
1168 "nvidia,tegra-audio-sgtl5000";
1170 nvidia,audio-routing =
1174 nvidia,i2s-controller = <&tegra_i2s2>;
1175 nvidia,audio-codec = <&sgtl5000>;
1179 clock-names = "pll_a", "pll_a_out0", "mclk";
1181 assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
1184 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,