Lines Matching +full:reg +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra124-peripherals-opp.dtsi"
15 interrupt-parent = <&lic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
21 reg = <0x0 0x80000000 0x0 0x0>;
25 compatible = "nvidia,tegra124-pcie";
27 reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */
30 reg-names = "pads", "afi", "cs";
33 interrupt-names = "intr", "msi";
35 #interrupt-cells = <1>;
36 interrupt-map-mask = <0 0 0 0>;
37 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
39 bus-range = <0x00 0xff>;
40 #address-cells = <3>;
41 #size-cells = <2>;
46 <0x02000000 0 0x13000000 0x0 0x13000000 0 0x0d000000>, /* non-prefetchable memory (208 MiB) */
53 clock-names = "pex", "afi", "pll_e", "cml";
57 reset-names = "pex", "afi", "pcie_x";
62 assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
63 reg = <0x000800 0 0 0 0>;
64 bus-range = <0x00 0xff>;
67 #address-cells = <3>;
68 #size-cells = <2>;
71 nvidia,num-lanes = <2>;
76 assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
77 reg = <0x001000 0 0 0 0>;
78 bus-range = <0x00 0xff>;
81 #address-cells = <3>;
82 #size-cells = <2>;
85 nvidia,num-lanes = <1>;
90 compatible = "nvidia,tegra124-host1x";
91 reg = <0x0 0x50000000 0x0 0x00034000>;
94 interrupt-names = "syncpt", "host1x";
96 clock-names = "host1x";
98 reset-names = "host1x", "mc";
101 #address-cells = <2>;
102 #size-cells = <2>;
107 compatible = "nvidia,tegra124-vi";
108 reg = <0x0 0x54080000 0x0 0x00040000>;
112 reset-names = "vi";
120 compatible = "nvidia,tegra124-isp";
121 reg = <0x0 0x54600000 0x0 0x00040000>;
125 reset-names = "isp";
133 compatible = "nvidia,tegra124-isp";
134 reg = <0x0 0x54680000 0x0 0x00040000>;
138 reset-names = "isp";
146 compatible = "nvidia,tegra124-dc";
147 reg = <0x0 0x54200000 0x0 0x00040000>;
150 clock-names = "dc";
152 reset-names = "dc";
164 interconnect-names = "wina",
173 compatible = "nvidia,tegra124-dc";
174 reg = <0x0 0x54240000 0x0 0x00040000>;
177 clock-names = "dc";
179 reset-names = "dc";
189 interconnect-names = "wina",
196 compatible = "nvidia,tegra124-hdmi";
197 reg = <0x0 0x54280000 0x0 0x00040000>;
201 clock-names = "hdmi", "parent";
203 reset-names = "hdmi";
208 compatible = "nvidia,tegra124-dsi";
209 reg = <0x0 0x54300000 0x0 0x00040000>;
213 clock-names = "dsi", "lp", "parent";
215 reset-names = "dsi";
216 nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */
219 #address-cells = <1>;
220 #size-cells = <0>;
224 compatible = "nvidia,tegra124-vic";
225 reg = <0x0 0x54340000 0x0 0x00040000>;
228 clock-names = "vic";
230 reset-names = "vic";
236 compatible = "nvidia,tegra124-dsi";
237 reg = <0x0 0x54400000 0x0 0x00040000>;
241 clock-names = "dsi", "lp", "parent";
243 reset-names = "dsi";
244 nvidia,mipi-calibrate = <&mipi 0x180>; /* DSIC & DSID pads */
247 #address-cells = <1>;
248 #size-cells = <0>;
252 compatible = "nvidia,tegra124-msenc";
253 reg = <0x0 0x544c0000 0x0 0x00040000>;
257 reset-names = "mpe";
265 compatible = "nvidia,tegra124-tsec";
266 reg = <0x0 0x54500000 0x0 0x00040000>;
277 compatible = "nvidia,tegra124-sor";
278 reg = <0x0 0x54540000 0x0 0x00040000>;
285 clock-names = "sor", "out", "parent", "dp", "safe";
287 reset-names = "sor";
292 compatible = "nvidia,tegra124-dpaux";
293 reg = <0x0 0x545c0000 0x0 0x00040000>;
297 clock-names = "dpaux", "parent";
299 reset-names = "dpaux";
302 i2c-bus {
303 #address-cells = <1>;
304 #size-cells = <0>;
309 gic: interrupt-controller@50041000 {
310 compatible = "arm,cortex-a15-gic";
311 #interrupt-cells = <3>;
312 interrupt-controller;
313 reg = <0x0 0x50041000 0x0 0x1000>,
319 interrupt-parent = <&gic>;
324 reg = <0x0 0x57000000 0x0 0x01000000>,
328 interrupt-names = "stall", "nonstall";
331 clock-names = "gpu", "pwr";
333 reset-names = "gpu";
340 lic: interrupt-controller@60004000 {
341 compatible = "nvidia,tegra124-ictlr", "nvidia,tegra30-ictlr";
342 reg = <0x0 0x60004000 0x0 0x100>,
347 interrupt-controller;
348 #interrupt-cells = <3>;
349 interrupt-parent = <&gic>;
353 compatible = "nvidia,tegra124-timer", "nvidia,tegra30-timer";
354 reg = <0x0 0x60005000 0x0 0x400>;
365 compatible = "nvidia,tegra124-car";
366 reg = <0x0 0x60006000 0x0 0x1000>;
367 #clock-cells = <1>;
368 #reset-cells = <1>;
369 nvidia,external-memory-controller = <&emc>;
372 flow-controller@60007000 {
373 compatible = "nvidia,tegra124-flowctrl";
374 reg = <0x0 0x60007000 0x0 0x1000>;
378 compatible = "nvidia,tegra124-actmon";
379 reg = <0x0 0x6000c800 0x0 0x400>;
383 clock-names = "actmon", "emc";
385 reset-names = "actmon";
386 operating-points-v2 = <&emc_bw_dfs_opp_table>;
388 interconnect-names = "cpu-read";
389 #cooling-cells = <2>;
393 compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
394 reg = <0x0 0x6000d000 0x0 0x1000>;
403 #gpio-cells = <2>;
404 gpio-controller;
405 #interrupt-cells = <2>;
406 interrupt-controller;
407 gpio-ranges = <&pinmux 0 0 251>;
411 compatible = "nvidia,tegra124-apbdma", "nvidia,tegra148-apbdma";
412 reg = <0x0 0x60020000 0x0 0x1400>;
447 reset-names = "dma";
448 #dma-cells = <1>;
452 compatible = "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc";
453 reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */
458 compatible = "nvidia,tegra124-pinmux";
459 reg = <0x0 0x70000868 0x0 0x164>, /* Pad control registers */
468 * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable
470 * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart".
473 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
474 reg = <0x0 0x70006000 0x0 0x40>;
475 reg-shift = <2>;
480 dma-names = "rx", "tx";
485 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
486 reg = <0x0 0x70006040 0x0 0x40>;
487 reg-shift = <2>;
492 dma-names = "rx", "tx";
497 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
498 reg = <0x0 0x70006200 0x0 0x40>;
499 reg-shift = <2>;
504 dma-names = "rx", "tx";
509 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
510 reg = <0x0 0x70006300 0x0 0x40>;
511 reg-shift = <2>;
516 dma-names = "rx", "tx";
521 compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
522 reg = <0x0 0x7000a000 0x0 0x100>;
523 #pwm-cells = <2>;
526 reset-names = "pwm";
531 compatible = "nvidia,tegra124-i2c";
532 reg = <0x0 0x7000c000 0x0 0x100>;
534 #address-cells = <1>;
535 #size-cells = <0>;
537 clock-names = "div-clk";
539 reset-names = "i2c";
541 dma-names = "rx", "tx";
546 compatible = "nvidia,tegra124-i2c";
547 reg = <0x0 0x7000c400 0x0 0x100>;
549 #address-cells = <1>;
550 #size-cells = <0>;
552 clock-names = "div-clk";
554 reset-names = "i2c";
556 dma-names = "rx", "tx";
561 compatible = "nvidia,tegra124-i2c";
562 reg = <0x0 0x7000c500 0x0 0x100>;
564 #address-cells = <1>;
565 #size-cells = <0>;
567 clock-names = "div-clk";
569 reset-names = "i2c";
571 dma-names = "rx", "tx";
576 compatible = "nvidia,tegra124-i2c";
577 reg = <0x0 0x7000c700 0x0 0x100>;
579 #address-cells = <1>;
580 #size-cells = <0>;
582 clock-names = "div-clk";
584 reset-names = "i2c";
586 dma-names = "rx", "tx";
591 compatible = "nvidia,tegra124-i2c";
592 reg = <0x0 0x7000d000 0x0 0x100>;
594 #address-cells = <1>;
595 #size-cells = <0>;
597 clock-names = "div-clk";
599 reset-names = "i2c";
601 dma-names = "rx", "tx";
606 compatible = "nvidia,tegra124-i2c";
607 reg = <0x0 0x7000d100 0x0 0x100>;
609 #address-cells = <1>;
610 #size-cells = <0>;
612 clock-names = "div-clk";
614 reset-names = "i2c";
616 dma-names = "rx", "tx";
621 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
622 reg = <0x0 0x7000d400 0x0 0x200>;
624 #address-cells = <1>;
625 #size-cells = <0>;
627 clock-names = "spi";
629 reset-names = "spi";
631 dma-names = "rx", "tx";
636 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
637 reg = <0x0 0x7000d600 0x0 0x200>;
639 #address-cells = <1>;
640 #size-cells = <0>;
642 clock-names = "spi";
644 reset-names = "spi";
646 dma-names = "rx", "tx";
651 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
652 reg = <0x0 0x7000d800 0x0 0x200>;
654 #address-cells = <1>;
655 #size-cells = <0>;
657 clock-names = "spi";
659 reset-names = "spi";
661 dma-names = "rx", "tx";
666 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
667 reg = <0x0 0x7000da00 0x0 0x200>;
669 #address-cells = <1>;
670 #size-cells = <0>;
672 clock-names = "spi";
674 reset-names = "spi";
676 dma-names = "rx", "tx";
681 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
682 reg = <0x0 0x7000dc00 0x0 0x200>;
684 #address-cells = <1>;
685 #size-cells = <0>;
687 clock-names = "spi";
689 reset-names = "spi";
691 dma-names = "rx", "tx";
696 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
697 reg = <0x0 0x7000de00 0x0 0x200>;
699 #address-cells = <1>;
700 #size-cells = <0>;
702 clock-names = "spi";
704 reset-names = "spi";
706 dma-names = "rx", "tx";
711 compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc";
712 reg = <0x0 0x7000e000 0x0 0x100>;
718 compatible = "nvidia,tegra124-pmc";
719 reg = <0x0 0x7000e400 0x0 0x400>;
721 clock-names = "pclk", "clk32k_in";
722 #clock-cells = <1>;
726 compatible = "nvidia,tegra124-efuse";
727 reg = <0x0 0x7000f800 0x0 0x400>;
729 clock-names = "fuse";
731 reset-names = "fuse";
735 compatible = "nvidia,tegra124-cec";
736 reg = <0x0 0x70015000 0x0 0x00001000>;
739 clock-names = "cec";
741 hdmi-phandle = <&hdmi>;
744 mc: memory-controller@70019000 {
745 compatible = "nvidia,tegra124-mc";
746 reg = <0x0 0x70019000 0x0 0x1000>;
748 clock-names = "mc";
752 #iommu-cells = <1>;
753 #reset-cells = <1>;
754 #interconnect-cells = <1>;
757 emc: external-memory-controller@7001b000 {
758 compatible = "nvidia,tegra124-emc";
759 reg = <0x0 0x7001b000 0x0 0x1000>;
761 clock-names = "emc";
763 nvidia,memory-controller = <&mc>;
764 operating-points-v2 = <&emc_icc_dvfs_opp_table>;
766 #interconnect-cells = <0>;
770 compatible = "nvidia,tegra124-ahci";
771 reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */
776 clock-names = "sata", "sata-oob";
780 reset-names = "sata", "sata-cold", "sata-oob";
785 compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda";
786 reg = <0x0 0x70030000 0x0 0x10000>;
791 clock-names = "hda", "hda2hdmi", "hda2codec_2x";
795 reset-names = "hda", "hda2hdmi", "hda2codec_2x";
800 compatible = "nvidia,tegra124-xusb";
801 reg = <0x0 0x70090000 0x0 0x8000>,
804 reg-names = "hcd", "fpci", "ipfs";
820 clock-names = "xusb_host", "xusb_host_src",
827 reset-names = "xusb_host", "xusb_ss", "xusb_src";
829 nvidia,xusb-padctl = <&padctl>;
835 compatible = "nvidia,tegra124-xusb-padctl";
836 reg = <0x0 0x7009f000 0x0 0x1000>;
838 reset-names = "padctl";
845 usb2-0 {
847 #phy-cells = <0>;
850 usb2-1 {
852 #phy-cells = <0>;
855 usb2-2 {
857 #phy-cells = <0>;
866 ulpi-0 {
868 #phy-cells = <0>;
877 hsic-0 {
879 #phy-cells = <0>;
882 hsic-1 {
884 #phy-cells = <0>;
893 pcie-0 {
895 #phy-cells = <0>;
898 pcie-1 {
900 #phy-cells = <0>;
903 pcie-2 {
905 #phy-cells = <0>;
908 pcie-3 {
910 #phy-cells = <0>;
913 pcie-4 {
915 #phy-cells = <0>;
924 sata-0 {
926 #phy-cells = <0>;
933 usb2-0 {
937 usb2-1 {
941 usb2-2 {
945 ulpi-0 {
949 hsic-0 {
953 hsic-1 {
957 usb3-0 {
961 usb3-1 {
968 compatible = "nvidia,tegra124-sdhci";
969 reg = <0x0 0x700b0000 0x0 0x200>;
972 clock-names = "sdhci";
974 reset-names = "sdhci";
979 compatible = "nvidia,tegra124-sdhci";
980 reg = <0x0 0x700b0200 0x0 0x200>;
983 clock-names = "sdhci";
985 reset-names = "sdhci";
990 compatible = "nvidia,tegra124-sdhci";
991 reg = <0x0 0x700b0400 0x0 0x200>;
994 clock-names = "sdhci";
996 reset-names = "sdhci";
1001 compatible = "nvidia,tegra124-sdhci";
1002 reg = <0x0 0x700b0600 0x0 0x200>;
1005 clock-names = "sdhci";
1007 reset-names = "sdhci";
1011 soctherm: thermal-sensor@700e2000 {
1012 compatible = "nvidia,tegra124-soctherm";
1013 reg = <0x0 0x700e2000 0x0 0x600>, /* SOC_THERM reg_base */
1015 reg-names = "soctherm-reg", "car-reg";
1018 interrupt-names = "thermal", "edp";
1021 clock-names = "tsensor", "soctherm";
1023 reset-names = "soctherm";
1024 #thermal-sensor-cells = <1>;
1026 throttle-cfgs {
1029 nvidia,cpu-throt-percent = <85>;
1030 nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
1032 #cooling-cells = <2>;
1038 compatible = "nvidia,tegra124-mipi";
1039 reg = <0x0 0x700e3000 0x0 0x100>;
1041 clock-names = "mipi-cal";
1042 #nvidia,mipi-calibrate-cells = <1>;
1046 compatible = "nvidia,tegra124-dfll";
1047 reg = <0 0x70110000 0 0x100>, /* DFLL control */
1050 <0 0x70110200 0 0x100>; /* Look-up table RAM */
1055 clock-names = "soc", "ref", "i2c";
1057 reset-names = "dvco";
1058 #clock-cells = <0>;
1059 clock-output-names = "dfllCPU_out";
1060 nvidia,sample-rate = <12500>;
1061 nvidia,droop-ctrl = <0x00000f00>;
1062 nvidia,force-mode = <1>;
1070 compatible = "nvidia,tegra124-ahub";
1071 reg = <0x0 0x70300000 0x0 0x200>,
1077 clock-names = "d_audio", "apbif";
1099 reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
1113 dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
1118 #address-cells = <2>;
1119 #size-cells = <2>;
1122 compatible = "nvidia,tegra124-i2s";
1123 reg = <0x0 0x70301000 0x0 0x100>;
1124 nvidia,ahub-cif-ids = <4 4>;
1127 reset-names = "i2s";
1132 compatible = "nvidia,tegra124-i2s";
1133 reg = <0x0 0x70301100 0x0 0x100>;
1134 nvidia,ahub-cif-ids = <5 5>;
1137 reset-names = "i2s";
1142 compatible = "nvidia,tegra124-i2s";
1143 reg = <0x0 0x70301200 0x0 0x100>;
1144 nvidia,ahub-cif-ids = <6 6>;
1147 reset-names = "i2s";
1152 compatible = "nvidia,tegra124-i2s";
1153 reg = <0x0 0x70301300 0x0 0x100>;
1154 nvidia,ahub-cif-ids = <7 7>;
1157 reset-names = "i2s";
1162 compatible = "nvidia,tegra124-i2s";
1163 reg = <0x0 0x70301400 0x0 0x100>;
1164 nvidia,ahub-cif-ids = <8 8>;
1167 reset-names = "i2s";
1173 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
1174 reg = <0x0 0x7d000000 0x0 0x4000>;
1179 reset-names = "usb";
1184 phy1: usb-phy@7d000000 {
1185 compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
1186 reg = <0x0 0x7d000000 0x0 0x4000>,
1193 clock-names = "reg", "pll_u", "utmi-pads";
1195 reset-names = "usb", "utmi-pads";
1196 #phy-cells = <0>;
1197 nvidia,hssync-start-delay = <0>;
1198 nvidia,idle-wait-delay = <17>;
1199 nvidia,elastic-limit = <16>;
1200 nvidia,term-range-adj = <6>;
1201 nvidia,xcvr-setup = <9>;
1202 nvidia,xcvr-lsfslew = <0>;
1203 nvidia,xcvr-lsrslew = <3>;
1204 nvidia,hssquelch-level = <2>;
1205 nvidia,hsdiscon-level = <5>;
1206 nvidia,xcvr-hsslew = <12>;
1207 nvidia,has-utmi-pad-registers;
1213 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
1214 reg = <0x0 0x7d004000 0x0 0x4000>;
1219 reset-names = "usb";
1224 phy2: usb-phy@7d004000 {
1225 compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
1226 reg = <0x0 0x7d004000 0x0 0x4000>,
1233 clock-names = "reg", "pll_u", "utmi-pads";
1235 reset-names = "usb", "utmi-pads";
1236 #phy-cells = <0>;
1237 nvidia,hssync-start-delay = <0>;
1238 nvidia,idle-wait-delay = <17>;
1239 nvidia,elastic-limit = <16>;
1240 nvidia,term-range-adj = <6>;
1241 nvidia,xcvr-setup = <9>;
1242 nvidia,xcvr-lsfslew = <0>;
1243 nvidia,xcvr-lsrslew = <3>;
1244 nvidia,hssquelch-level = <2>;
1245 nvidia,hsdiscon-level = <5>;
1246 nvidia,xcvr-hsslew = <12>;
1252 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
1253 reg = <0x0 0x7d008000 0x0 0x4000>;
1258 reset-names = "usb";
1263 phy3: usb-phy@7d008000 {
1264 compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
1265 reg = <0x0 0x7d008000 0x0 0x4000>,
1272 clock-names = "reg", "pll_u", "utmi-pads";
1274 reset-names = "usb", "utmi-pads";
1275 #phy-cells = <0>;
1276 nvidia,hssync-start-delay = <0>;
1277 nvidia,idle-wait-delay = <17>;
1278 nvidia,elastic-limit = <16>;
1279 nvidia,term-range-adj = <6>;
1280 nvidia,xcvr-setup = <9>;
1281 nvidia,xcvr-lsfslew = <0>;
1282 nvidia,xcvr-lsrslew = <3>;
1283 nvidia,hssquelch-level = <2>;
1284 nvidia,hsdiscon-level = <5>;
1285 nvidia,xcvr-hsslew = <12>;
1291 #address-cells = <1>;
1292 #size-cells = <0>;
1296 compatible = "arm,cortex-a15";
1297 reg = <0>;
1304 clock-names = "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll";
1306 clock-latency = <300000>;
1311 compatible = "arm,cortex-a15";
1312 reg = <1>;
1317 compatible = "arm,cortex-a15";
1318 reg = <2>;
1323 compatible = "arm,cortex-a15";
1324 reg = <3>;
1329 compatible = "arm,cortex-a15-pmu";
1334 interrupt-affinity = <&{/cpus/cpu@0}>,
1340 thermal-zones {
1341 cpu-thermal {
1342 polling-delay-passive = <1000>;
1343 polling-delay = <1000>;
1345 thermal-sensors =
1349 cpu-shutdown-trip {
1354 cpu_throttle_trip: throttle-trip {
1361 cooling-maps {
1364 cooling-device = <&throttle_heavy 1 1>;
1369 mem-thermal {
1370 polling-delay-passive = <1000>;
1371 polling-delay = <1000>;
1373 thermal-sensors =
1377 mem-shutdown-trip {
1382 mem-throttle-trip {
1389 cooling-maps {
1397 gpu-thermal {
1398 polling-delay-passive = <1000>;
1399 polling-delay = <1000>;
1401 thermal-sensors =
1405 gpu-shutdown-trip {
1410 gpu_throttle_trip: throttle-trip {
1417 cooling-maps {
1420 cooling-device = <&throttle_heavy 1 1>;
1425 pllx-thermal {
1426 polling-delay-passive = <1000>;
1427 polling-delay = <1000>;
1429 thermal-sensors =
1433 pllx-shutdown-trip {
1438 pllx-throttle-trip {
1445 cooling-maps {
1455 compatible = "arm,armv7-timer";
1464 interrupt-parent = <&gic>;