Lines Matching +full:lpc +full:- +full:interrupts
1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
7 #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&gic>;
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <25000000>;
19 clock-output-names = "refclk";
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <800000000>;
27 clock-output-names = "sysbypck";
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <800000000>;
35 clock-output-names = "mcbypck";
40 compatible = "fixed-clock";
41 #clock-cells = <0>;
42 clock-frequency = <125000000>;
43 clock-output-names = "clk_rg1refck";
48 compatible = "fixed-clock";
49 #clock-cells = <0>;
50 clock-frequency = <125000000>;
51 clock-output-names = "clk_rg2refck";
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <50000000>;
58 clock-output-names = "clk_xin";
62 #address-cells = <1>;
63 #size-cells = <1>;
64 compatible = "simple-bus";
65 interrupt-parent = <&gic>;
69 compatible = "arm,cortex-a9-scu";
73 l2: cache-controller@3fc000 {
74 compatible = "arm,pl310-cache";
76 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
77 cache-unified;
78 cache-level = <2>;
80 arm,shared-override;
83 gic: interrupt-controller@3ff000 {
84 compatible = "arm,cortex-a9-gic";
85 interrupt-controller;
86 #interrupt-cells = <3>;
92 compatible = "nuvoton,npcm750-gcr", "syscon", "simple-mfd";
97 compatible = "nuvoton,npcm750-rst", "syscon", "simple-mfd";
103 #address-cells = <1>;
104 #size-cells = <1>;
105 compatible = "simple-bus";
106 interrupt-parent = <&gic>;
110 compatible = "nuvoton,npcm750-reset";
112 #reset-cells = <2>;
116 clk: clock-controller@f0801000 {
117 compatible = "nuvoton,npcm750-clk", "syscon";
118 #clock-cells = <1>;
119 clock-controller;
121 clock-names = "refclk", "sysbypck", "mcbypck";
129 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
130 interrupt-names = "macirq";
133 clock-names = "stmmaceth", "clk_gmac";
134 pinctrl-names = "default";
135 pinctrl-0 = <&rg1_pins
141 compatible = "nuvoton,npcm750-ehci";
143 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
148 compatible = "nuvoton,npcm750-fiu";
149 #address-cells = <1>;
150 #size-cells = <0>;
152 reg-names = "control", "memory";
154 clock-names = "clk_spi0";
159 compatible = "nuvoton,npcm750-fiu";
160 #address-cells = <1>;
161 #size-cells = <0>;
163 reg-names = "control", "memory";
165 clock-names = "clk_spi3";
166 pinctrl-names = "default";
167 pinctrl-0 = <&spi3_pins>;
172 compatible = "nuvoton,npcm750-fiu";
173 #address-cells = <1>;
174 #size-cells = <0>;
176 reg-names = "control", "memory";
178 clock-names = "clk_spix";
183 #address-cells = <1>;
184 #size-cells = <1>;
185 compatible = "simple-bus";
186 interrupt-parent = <&gic>;
190 compatible = "nuvoton,npcm750-lpc-kcs", "simple-mfd", "syscon";
192 reg-io-width = <1>;
194 #address-cells = <1>;
195 #size-cells = <1>;
199 compatible = "nuvoton,npcm750-kcs-bmc";
201 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
207 compatible = "nuvoton,npcm750-kcs-bmc";
209 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
215 compatible = "nuvoton,npcm750-kcs-bmc";
217 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
223 peci: peci-controller@f0100000 {
224 compatible = "nuvoton,npcm750-peci";
226 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
228 cmd-timeout-ms = <1000>;
233 compatible = "nuvoton,npcm750-pspi";
235 pinctrl-names = "default";
236 pinctrl-0 = <&pspi1_pins>;
237 #address-cells = <1>;
238 #size-cells = <0>;
239 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
241 clock-names = "clk_apb5";
247 compatible = "nuvoton,npcm750-pspi";
249 pinctrl-names = "default";
250 pinctrl-0 = <&pspi2_pins>;
251 #address-cells = <1>;
252 #size-cells = <0>;
253 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
255 clock-names = "clk_apb5";
261 compatible = "nuvoton,npcm750-timer";
262 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
268 compatible = "nuvoton,npcm750-wdt";
269 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
276 compatible = "nuvoton,npcm750-wdt";
277 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
284 compatible = "nuvoton,npcm750-wdt";
285 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
292 compatible = "nuvoton,npcm750-uart";
295 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
296 reg-shift = <2>;
301 compatible = "nuvoton,npcm750-uart";
304 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
305 reg-shift = <2>;
310 compatible = "nuvoton,npcm750-uart";
313 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
314 reg-shift = <2>;
319 compatible = "nuvoton,npcm750-uart";
322 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
323 reg-shift = <2>;
328 compatible = "nuvoton,npcm750-rng";
334 compatible = "nuvoton,npcm750-adc";
336 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
342 pwm_fan: pwm-fan-controller@103000 {
343 #address-cells = <1>;
344 #size-cells = <0>;
345 compatible = "nuvoton,npcm750-pwm-fan";
347 reg-names = "pwm", "fan";
350 clock-names = "pwm","fan";
351 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
359 pinctrl-names = "default";
360 pinctrl-0 = <&pwm0_pins &pwm1_pins
377 compatible = "nuvoton,npcm750-i2c";
378 #address-cells = <1>;
379 #size-cells = <0>;
381 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
382 pinctrl-names = "default";
383 pinctrl-0 = <&smb0_pins>;
389 compatible = "nuvoton,npcm750-i2c";
390 #address-cells = <1>;
391 #size-cells = <0>;
393 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
394 pinctrl-names = "default";
395 pinctrl-0 = <&smb1_pins>;
401 compatible = "nuvoton,npcm750-i2c";
402 #address-cells = <1>;
403 #size-cells = <0>;
405 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
406 pinctrl-names = "default";
407 pinctrl-0 = <&smb2_pins>;
413 compatible = "nuvoton,npcm750-i2c";
414 #address-cells = <1>;
415 #size-cells = <0>;
417 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
418 pinctrl-names = "default";
419 pinctrl-0 = <&smb3_pins>;
425 compatible = "nuvoton,npcm750-i2c";
426 #address-cells = <1>;
427 #size-cells = <0>;
429 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
430 pinctrl-names = "default";
431 pinctrl-0 = <&smb4_pins>;
437 compatible = "nuvoton,npcm750-i2c";
438 #address-cells = <1>;
439 #size-cells = <0>;
441 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
442 pinctrl-names = "default";
443 pinctrl-0 = <&smb5_pins>;
449 compatible = "nuvoton,npcm750-i2c";
450 #address-cells = <1>;
451 #size-cells = <0>;
453 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
454 pinctrl-names = "default";
455 pinctrl-0 = <&smb6_pins>;
461 compatible = "nuvoton,npcm750-i2c";
462 #address-cells = <1>;
463 #size-cells = <0>;
465 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
466 pinctrl-names = "default";
467 pinctrl-0 = <&smb7_pins>;
473 compatible = "nuvoton,npcm750-i2c";
474 #address-cells = <1>;
475 #size-cells = <0>;
477 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
478 pinctrl-names = "default";
479 pinctrl-0 = <&smb8_pins>;
485 compatible = "nuvoton,npcm750-i2c";
486 #address-cells = <1>;
487 #size-cells = <0>;
489 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
490 pinctrl-names = "default";
491 pinctrl-0 = <&smb9_pins>;
497 compatible = "nuvoton,npcm750-i2c";
498 #address-cells = <1>;
499 #size-cells = <0>;
501 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
502 pinctrl-names = "default";
503 pinctrl-0 = <&smb10_pins>;
509 compatible = "nuvoton,npcm750-i2c";
510 #address-cells = <1>;
511 #size-cells = <0>;
513 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
514 pinctrl-names = "default";
515 pinctrl-0 = <&smb11_pins>;
521 compatible = "nuvoton,npcm750-i2c";
522 #address-cells = <1>;
523 #size-cells = <0>;
525 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
526 pinctrl-names = "default";
527 pinctrl-0 = <&smb12_pins>;
533 compatible = "nuvoton,npcm750-i2c";
534 #address-cells = <1>;
535 #size-cells = <0>;
537 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
538 pinctrl-names = "default";
539 pinctrl-0 = <&smb13_pins>;
545 compatible = "nuvoton,npcm750-i2c";
546 #address-cells = <1>;
547 #size-cells = <0>;
549 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
550 pinctrl-names = "default";
551 pinctrl-0 = <&smb14_pins>;
557 compatible = "nuvoton,npcm750-i2c";
558 #address-cells = <1>;
559 #size-cells = <0>;
561 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
562 pinctrl-names = "default";
563 pinctrl-0 = <&smb15_pins>;
570 #address-cells = <1>;
571 #size-cells = <1>;
572 compatible = "nuvoton,npcm750-pinctrl", "syscon", "simple-mfd";
575 gpio-controller;
576 #gpio-cells = <2>;
578 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
579 gpio-ranges = <&pinctrl 0 0 32>;
582 gpio-controller;
583 #gpio-cells = <2>;
585 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
586 gpio-ranges = <&pinctrl 0 32 32>;
589 gpio-controller;
590 #gpio-cells = <2>;
592 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
593 gpio-ranges = <&pinctrl 0 64 32>;
596 gpio-controller;
597 #gpio-cells = <2>;
599 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
600 gpio-ranges = <&pinctrl 0 96 32>;
603 gpio-controller;
604 #gpio-cells = <2>;
606 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
607 gpio-ranges = <&pinctrl 0 128 32>;
610 gpio-controller;
611 #gpio-cells = <2>;
613 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
614 gpio-ranges = <&pinctrl 0 160 32>;
617 gpio-controller;
618 #gpio-cells = <2>;
620 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
621 gpio-ranges = <&pinctrl 0 192 32>;
624 gpio-controller;
625 #gpio-cells = <2>;
627 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
628 gpio-ranges = <&pinctrl 0 224 32>;
631 iox1_pins: iox1-pins {
635 iox2_pins: iox2-pins {
639 smb1d_pins: smb1d-pins {
643 smb2d_pins: smb2d-pins {
647 lkgpo1_pins: lkgpo1-pins {
651 lkgpo2_pins: lkgpo2-pins {
655 ioxh_pins: ioxh-pins {
659 gspi_pins: gspi-pins {
663 smb5b_pins: smb5b-pins {
667 smb5c_pins: smb5c-pins {
671 lkgpo0_pins: lkgpo0-pins {
675 pspi2_pins: pspi2-pins {
679 smb4den_pins: smb4den-pins {
683 smb4b_pins: smb4b-pins {
687 smb4c_pins: smb4c-pins {
691 smb15_pins: smb15-pins {
695 smb4d_pins: smb4d-pins {
699 smb14_pins: smb14-pins {
703 smb5_pins: smb5-pins {
707 smb4_pins: smb4-pins {
711 smb3_pins: smb3-pins {
715 spi0cs1_pins: spi0cs1-pins {
719 spi0cs2_pins: spi0cs2-pins {
723 spi0cs3_pins: spi0cs3-pins {
727 smb3c_pins: smb3c-pins {
731 smb3b_pins: smb3b-pins {
735 bmcuart0a_pins: bmcuart0a-pins {
739 uart1_pins: uart1-pins {
743 jtag2_pins: jtag2-pins {
747 bmcuart1_pins: bmcuart1-pins {
751 uart2_pins: uart2-pins {
755 bmcuart0b_pins: bmcuart0b-pins {
759 r1err_pins: r1err-pins {
763 r1md_pins: r1md-pins {
767 smb3d_pins: smb3d-pins {
771 fanin0_pins: fanin0-pins {
775 fanin1_pins: fanin1-pins {
779 fanin2_pins: fanin2-pins {
783 fanin3_pins: fanin3-pins {
787 fanin4_pins: fanin4-pins {
791 fanin5_pins: fanin5-pins {
795 fanin6_pins: fanin6-pins {
799 fanin7_pins: fanin7-pins {
803 fanin8_pins: fanin8-pins {
807 fanin9_pins: fanin9-pins {
811 fanin10_pins: fanin10-pins {
815 fanin11_pins: fanin11-pins {
819 fanin12_pins: fanin12-pins {
823 fanin13_pins: fanin13-pins {
827 fanin14_pins: fanin14-pins {
831 fanin15_pins: fanin15-pins {
835 pwm0_pins: pwm0-pins {
839 pwm1_pins: pwm1-pins {
843 pwm2_pins: pwm2-pins {
847 pwm3_pins: pwm3-pins {
851 r2_pins: r2-pins {
855 r2err_pins: r2err-pins {
859 r2md_pins: r2md-pins {
863 ga20kbc_pins: ga20kbc-pins {
867 smb5d_pins: smb5d-pins {
871 lpc_pins: lpc-pins {
872 groups = "lpc";
873 function = "lpc";
875 espi_pins: espi-pins {
879 rg1_pins: rg1-pins {
883 rg1mdio_pins: rg1mdio-pins {
887 rg2_pins: rg2-pins {
891 ddr_pins: ddr-pins {
895 smb0_pins: smb0-pins {
899 smb1_pins: smb1-pins {
903 smb2_pins: smb2-pins {
907 smb2c_pins: smb2c-pins {
911 smb2b_pins: smb2b-pins {
915 smb1c_pins: smb1c-pins {
919 smb1b_pins: smb1b-pins {
923 smb8_pins: smb8-pins {
927 smb9_pins: smb9-pins {
931 smb10_pins: smb10-pins {
935 smb11_pins: smb11-pins {
939 sd1_pins: sd1-pins {
943 sd1pwr_pins: sd1pwr-pins {
947 pwm4_pins: pwm4-pins {
951 pwm5_pins: pwm5-pins {
955 pwm6_pins: pwm6-pins {
959 pwm7_pins: pwm7-pins {
963 mmc8_pins: mmc8-pins {
967 mmc_pins: mmc-pins {
971 mmcwp_pins: mmcwp-pins {
975 mmccd_pins: mmccd-pins {
979 mmcrst_pins: mmcrst-pins {
983 clkout_pins: clkout-pins {
987 serirq_pins: serirq-pins {
991 lpcclk_pins: lpcclk-pins {
995 scipme_pins: scipme-pins {
999 sci_pins: sci-pins {
1003 smb6_pins: smb6-pins {
1007 smb7_pins: smb7-pins {
1011 pspi1_pins: pspi1-pins {
1015 faninx_pins: faninx-pins {
1019 r1_pins: r1-pins {
1023 spi3_pins: spi3-pins {
1027 spi3cs1_pins: spi3cs1-pins {
1031 spi3quad_pins: spi3quad-pins {
1035 spi3cs2_pins: spi3cs2-pins {
1039 spi3cs3_pins: spi3cs3-pins {
1043 nprd_smi_pins: nprd-smi-pins {
1047 smb0b_pins: smb0b-pins {
1051 smb0c_pins: smb0c-pins {
1055 smb0den_pins: smb0den-pins {
1059 smb0d_pins: smb0d-pins {
1063 ddc_pins: ddc-pins {
1067 rg2mdio_pins: rg2mdio-pins {
1071 wdog1_pins: wdog1-pins {
1075 wdog2_pins: wdog2-pins {
1079 smb12_pins: smb12-pins {
1083 smb13_pins: smb13-pins {
1087 spix_pins: spix-pins {
1091 spixcs1_pins: spixcs1-pins {
1095 clkreq_pins: clkreq-pins {
1099 hgpio0_pins: hgpio0-pins {
1103 hgpio1_pins: hgpio1-pins {
1107 hgpio2_pins: hgpio2-pins {
1111 hgpio3_pins: hgpio3-pins {
1115 hgpio4_pins: hgpio4-pins {
1119 hgpio5_pins: hgpio5-pins {
1123 hgpio6_pins: hgpio6-pins {
1127 hgpio7_pins: hgpio7-pins {