Lines Matching +full:0 +full:x8f000
17 #clock-cells = <0>;
25 #clock-cells = <0>;
33 #clock-cells = <0>;
41 #clock-cells = <0>;
49 #clock-cells = <0>;
56 #clock-cells = <0>;
66 ranges = <0x0 0xf0000000 0x00900000>;
70 reg = <0x3fe000 0x1000>;
75 reg = <0x3fc000 0x1000>;
87 reg = <0x3ff000 0x1000>,
88 <0x3fe100 0x100>;
93 reg = <0x800000 0x1000>;
98 reg = <0x801000 0x6C>;
104 #phy-cells = <0>;
116 reg = <0xf0801000 0x70>;
125 reg = <0xf0801000 0x1000>;
132 reg = <0xf0824000 0x1000>;
140 reg = <0xf0802000 0x2000>;
143 ethernet = <0>;
147 pinctrl-0 = <&rg1_pins
155 reg = <0xf0842000 0x200>;
160 pinctrl-0 = <&mmc8_pins
167 reg = <0xf0840000 0x200>;
172 pinctrl-0 = <&sd1_pins>;
177 reg = <0xf0806000 0x1000>;
184 reg = <0xf0807000 0x1000>;
192 #size-cells = <0>;
193 reg = <0xfb000000 0x1000>;
203 #size-cells = <0>;
204 reg = <0xc0000000 0x1000>;
209 pinctrl-0 = <&spi3_pins>;
216 #size-cells = <0>;
217 reg = <0xfb001000 0x1000>;
226 reg = <0xf0835000 0x1000
227 0xfffd2800 0x800>;
239 reg = <0xf0836000 0x1000
240 0xfffd3000 0x800>;
252 reg = <0xf0837000 0x1000
253 0xfffd3800 0x800>;
265 reg = <0xf0838000 0x1000
266 0xfffd4000 0x800>;
278 reg = <0xf0839000 0x1000
279 0xfffd4800 0x800>;
295 ranges = <0x0 0xf0000000 0x00300000>;
299 reg = <0x7000 0x40>;
304 ranges = <0x0 0x7000 0x40>;
306 kcs1: kcs1@0 {
308 reg = <0x0 0x40>;
314 kcs2: kcs2@0 {
316 reg = <0x0 0x40>;
322 kcs3: kcs3@0 {
324 reg = <0x0 0x40>;
333 reg = <0xf0100000 0x200>;
342 reg = <0x200000 0x1000>;
344 pinctrl-0 = <&pspi1_pins>;
346 #size-cells = <0>;
356 reg = <0x201000 0x1000>;
358 pinctrl-0 = <&pspi2_pins>;
360 #size-cells = <0>;
371 reg = <0x8000 0x1C>;
378 reg = <0x801C 0x4>;
386 reg = <0x901C 0x4>;
394 reg = <0xa01C 0x4>;
401 reg = <0x1000 0x1000>;
410 reg = <0x2000 0x1000>;
419 reg = <0x3000 0x1000>;
428 reg = <0x4000 0x1000>;
437 reg = <0xb000 0x8>;
443 reg = <0xc000 0x8>;
444 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
452 #size-cells = <0>;
454 reg = <0x103000 0x2000>, <0x180000 0x8000>;
468 pinctrl-0 = <&pwm0_pins &pwm1_pins
484 reg = <0x80000 0x1000>;
487 #size-cells = <0>;
491 pinctrl-0 = <&smb0_pins>;
496 reg = <0x81000 0x1000>;
499 #size-cells = <0>;
503 pinctrl-0 = <&smb1_pins>;
508 reg = <0x82000 0x1000>;
511 #size-cells = <0>;
515 pinctrl-0 = <&smb2_pins>;
520 reg = <0x83000 0x1000>;
523 #size-cells = <0>;
527 pinctrl-0 = <&smb3_pins>;
532 reg = <0x84000 0x1000>;
535 #size-cells = <0>;
539 pinctrl-0 = <&smb4_pins>;
544 reg = <0x85000 0x1000>;
547 #size-cells = <0>;
551 pinctrl-0 = <&smb5_pins>;
556 reg = <0x86000 0x1000>;
559 #size-cells = <0>;
563 pinctrl-0 = <&smb6_pins>;
568 reg = <0x87000 0x1000>;
571 #size-cells = <0>;
575 pinctrl-0 = <&smb7_pins>;
580 reg = <0x88000 0x1000>;
583 #size-cells = <0>;
587 pinctrl-0 = <&smb8_pins>;
592 reg = <0x89000 0x1000>;
595 #size-cells = <0>;
599 pinctrl-0 = <&smb9_pins>;
604 reg = <0x8a000 0x1000>;
607 #size-cells = <0>;
611 pinctrl-0 = <&smb10_pins>;
616 reg = <0x8b000 0x1000>;
619 #size-cells = <0>;
623 pinctrl-0 = <&smb11_pins>;
628 reg = <0x8c000 0x1000>;
631 #size-cells = <0>;
635 pinctrl-0 = <&smb12_pins>;
640 reg = <0x8d000 0x1000>;
643 #size-cells = <0>;
647 pinctrl-0 = <&smb13_pins>;
652 reg = <0x8e000 0x1000>;
655 #size-cells = <0>;
659 pinctrl-0 = <&smb14_pins>;
664 reg = <0x8f000 0x1000>;
667 #size-cells = <0>;
671 pinctrl-0 = <&smb15_pins>;
681 ranges = <0 0xf0010000 0x8000>;
685 reg = <0x0 0x80>;
687 gpio-ranges = <&pinctrl 0 0 32>;
692 reg = <0x1000 0x80>;
694 gpio-ranges = <&pinctrl 0 32 32>;
699 reg = <0x2000 0x80>;
701 gpio-ranges = <&pinctrl 0 64 32>;
706 reg = <0x3000 0x80>;
708 gpio-ranges = <&pinctrl 0 96 32>;
713 reg = <0x4000 0x80>;
715 gpio-ranges = <&pinctrl 0 128 32>;
720 reg = <0x5000 0x80>;
722 gpio-ranges = <&pinctrl 0 160 32>;
727 reg = <0x6000 0x80>;
729 gpio-ranges = <&pinctrl 0 192 32>;
734 reg = <0x7000 0x80>;
736 gpio-ranges = <&pinctrl 0 224 32>;