Lines Matching +full:0 +full:x200
31 #size-cells = <0>;
33 cpu0: cpu@0 {
36 reg = <0x0>;
41 d-cache-size = <0x8000>; // L1, 32 KB
42 i-cache-size = <0x8000>; // L1, 32 KB
48 cache-size = <0x40000>; // L2, 256 KB
98 hysteresis = <0>;
104 hysteresis = <0>;
110 hysteresis = <0>;
133 #clock-cells = <0>;
139 #clock-cells = <0>;
144 #clock-cells = <0>;
164 reg = <0x100000 0x20000>;
170 #thermal-sensor-cells = <0>;
184 reg = <0x00600000 0x2400>;
187 ranges = <0 0x00600000 0x2400>;
192 reg = <0x10000000 0x8000000>;
200 reg = <0x40000000 0x20000000>;
201 ranges = <0x0 0x0 0x40000000 0x8000000
202 0x1 0x0 0x48000000 0x8000000
203 0x2 0x0 0x50000000 0x8000000
204 0x3 0x0 0x58000000 0x8000000>;
222 reg = <0xe0000000 0x4000>;
226 ranges = <0 0xe0000000 0x4000>;
232 reg = <0xe0004000 0x4000>;
239 reg = <0xe0008000 0x20>;
244 reg = <0xe0014000 0x800>;
259 reg = <0xe0018000 0x200>;
262 clocks = <&clk32k 1>, <&clk32k 0>, <&main_xtal>;
268 reg = <0xe001d000 0xc>, <0xe001d0e4 0x4>;
270 clocks = <&clk32k 0>;
275 reg = <0xe001d010 0x10>;
276 clocks = <&clk32k 0>;
278 #size-cells = <0>;
286 reg = <0xe001d020 0x30>;
293 reg = <0xe001d050 0x4>;
300 reg = <0xe001d060 0x48>;
305 reg = <0xe001d0a8 0x30>;
312 reg = <0xe001d180 0x24>;
314 clocks = <&clk32k 0>;
319 reg = <0xe0020000 0x8>;
325 #size-cells = <0>;
326 reg = <0xe0800000 0x100>;
334 reg = <0xe0808000 0x1000>;
343 reg = <0xe0808070 0x490>,
344 <0xe0808500 0x200>;
350 reg = <0xe080c000 0x400>, <0x20000000 0x10000000>;
359 #size-cells = <0>;
365 reg = <0xe0810000 0x400>, <0x30000000 0x10000000>;
374 #size-cells = <0>;
380 reg = <0xe0828000 0x100>, <0x100000 0x7800>;
390 bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>;
396 reg = <0xe082c000 0x100>, <0x100000 0xbc00>;
406 bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
412 reg = <0xe0830000 0x100>, <0x100000 0x10000>;
422 bosch,mram-cfg = <0xbc00 0 0 64 0 0 32 32>;
428 reg = <0xe0834000 0x100>, <0x110000 0x4400>;
438 bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
444 reg = <0xe0838000 0x100>, <0x110000 0x8800>;
454 bosch,mram-cfg = <0x4400 0 0 64 0 0 32 32>;
460 reg = <0xe083c000 0x100>, <0x110000 0xcc00>;
470 bosch,mram-cfg = <0x8800 0 0 64 0 0 32 32>;
476 reg = <0xe1000000 0x200>;
482 dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>;
495 reg = <0xe1204000 0x4000>;
508 reg = <0xe1208000 0x4000>;
521 reg = <0xe120c000 0x4000>;
534 reg = <0xe1404000 0x500>;
543 #size-cells = <0>;
544 port@0 {
545 reg = <0>;
564 reg = <0xe1408000 0x2000>;
568 #clock-cells = <0>;
585 reg = <0xe1604000 0x4000>;
594 reg = <0xe1608000 0x1000>;
596 #sound-dai-cells = <0>;
606 reg = <0xe160c000 0x1000>;
608 #sound-dai-cells = <0>;
617 #sound-dai-cells = <0>;
619 reg = <0xe1614000 0x4000>;
629 #sound-dai-cells = <0>;
631 reg = <0xe1618000 0x4000>;
641 #sound-dai-cells = <0>;
642 reg = <0xe161c000 0x4000>;
653 #sound-dai-cells = <0>;
654 reg = <0xe1620000 0x4000>;
665 reg = <0xe1628000 0xec>;
678 reg = <0xe1800000 0x4000>;
686 reg = <0xe1804000 0x4000>;
694 reg = <0xe1810000 0x100>;
705 reg = <0xe1814000 0x100>;
715 reg = <0xe1818000 0x200>;
719 ranges = <0x0 0xe1818000 0x800>;
724 reg = <0x200 0x200>;
740 reg = <0xe181c000 0x200>;
744 ranges = <0x0 0xe181c000 0x800>;
749 reg = <0x600 0x200>;
752 #size-cells = <0>;
764 reg = <0xe1824000 0x200>;
768 ranges = <0x0 0xe1824000 0x800>;
773 reg = <0x200 0x200>;
789 reg = <0xe2010000 0x100>;
797 reg = <0xe2014000 0x100>;
808 reg = <0xe2018000 0x200>;
812 ranges = <0x0 0xe2018000 0x800>;
817 reg = <0x200 0x200>;
834 reg = <0xe2024000 0x200>;
838 ranges = <0x0 0xe2024000 0x800>;
843 reg = <0x200 0x200>;
860 reg = <0xe2800000 0x1000>;
876 reg = <0xe2804000 0x1000>;
886 reg = <0xe2808000 0x1000>;
896 reg = <0xe280c000 0x1000>;
907 reg = <0xe1200000 0x1000>;
912 dma-requests = <0>;
919 #size-cells = <0>;
920 reg = <0xe2814000 0x100>;
928 reg = <0xe2818000 0x200>;
932 ranges = <0x0 0xe2818000 0x800>;
937 reg = <0x600 0x200>;
940 #size-cells = <0>;
952 reg = <0xe281c000 0x200>;
956 ranges = <0x0 0xe281c000 0x800>;
961 reg = <0x600 0x200>;
964 #size-cells = <0>;
976 reg = <0xe2820000 0x200>;
980 ranges = <0x0 0xe2820000 0x800>;
985 reg = <0x600 0x200>;
988 #size-cells = <0>;
1000 reg = <0xe2824000 0x200>;
1004 ranges = <0x0 0xe2824000 0x800>;
1009 reg = <0x400 0x200>;
1014 #size-cells = <0>;
1025 reg = <0xe3800000 0x4000>;
1030 reg = <0xe3804000 0x1000>;
1035 reg = <0xe8c00000 0x100>;
1047 #address-cells = <0>;
1049 reg = <0xe8c11000 0x1000>,
1050 <0xe8c12000 0x2000>;