Lines Matching +full:at91sam9g46 +full:- +full:sha
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/clock/at91.h>
15 #include <dt-bindings/mfd/at91-usart.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
22 interrupt-parent = <&aic>;
45 #address-cells = <1>;
46 #size-cells = <0>;
49 compatible = "arm,cortex-a5";
55 compatible = "arm,cortex-a5-pmu";
66 compatible = "fixed-clock";
67 #clock-cells = <0>;
68 clock-frequency = <0>;
72 compatible = "fixed-clock";
73 #clock-cells = <0>;
74 clock-frequency = <0>;
78 compatible = "fixed-clock";
79 #clock-cells = <0>;
80 clock-frequency = <1000000>;
85 compatible = "mmio-sram";
87 #address-cells = <1>;
88 #size-cells = <1>;
93 compatible = "simple-bus";
94 #address-cells = <1>;
95 #size-cells = <1>;
99 compatible = "simple-bus";
100 #address-cells = <1>;
101 #size-cells = <1>;
109 dma-names = "rxtx";
110 pinctrl-names = "default";
111 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
113 #address-cells = <1>;
114 #size-cells = <0>;
116 clock-names = "mci_clk";
120 #address-cells = <1>;
121 #size-cells = <0>;
122 compatible = "atmel,at91rm9200-spi";
127 dma-names = "tx", "rx";
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_spi0>;
131 clock-names = "spi_clk";
136 compatible = "atmel,at91sam9g45-ssc";
141 dma-names = "tx", "rx";
142 pinctrl-names = "default";
143 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
145 clock-names = "pclk";
150 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
151 #address-cells = <1>;
152 #size-cells = <0>;
156 clock-names = "t0_clk", "slow_clk";
160 compatible = "atmel,at91sam9x5-i2c";
165 dma-names = "tx", "rx";
166 pinctrl-names = "default", "gpio";
167 pinctrl-0 = <&pinctrl_i2c0>;
168 pinctrl-1 = <&pinctrl_i2c0_gpio>;
169 sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>;
170 scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
171 #address-cells = <1>;
172 #size-cells = <0>;
178 compatible = "atmel,at91sam9x5-i2c";
183 dma-names = "tx", "rx";
184 pinctrl-names = "default", "gpio";
185 pinctrl-0 = <&pinctrl_i2c1>;
186 pinctrl-1 = <&pinctrl_i2c1_gpio>;
187 sda-gpios = <&pioC 26 GPIO_ACTIVE_HIGH>;
188 scl-gpios = <&pioC 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
189 #address-cells = <1>;
190 #size-cells = <0>;
196 compatible = "atmel,at91sam9260-usart";
198 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
202 dma-names = "tx", "rx";
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_usart0>;
206 clock-names = "usart";
211 compatible = "atmel,at91sam9260-usart";
213 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
217 dma-names = "tx", "rx";
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_usart1>;
221 clock-names = "usart";
226 compatible = "atmel,at91sam9260-usart";
228 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
230 pinctrl-names = "default";
231 pinctrl-0 = <&pinctrl_uart0>;
233 clock-names = "usart";
238 compatible = "atmel,sama5d3-pwm";
241 #pwm-cells = <3>;
247 compatible = "atmel,at91sam9g45-isi";
250 pinctrl-names = "default";
251 pinctrl-0 = <&pinctrl_isi_data_0_7>;
253 clock-names = "isi_clk";
256 #address-cells = <1>;
257 #size-cells = <0>;
262 compatible = "atmel,sama5d3-sfr", "syscon";
271 dma-names = "rxtx";
272 pinctrl-names = "default";
273 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
275 #address-cells = <1>;
276 #size-cells = <0>;
278 clock-names = "mci_clk";
282 #address-cells = <1>;
283 #size-cells = <0>;
284 compatible = "atmel,at91rm9200-spi";
289 dma-names = "tx", "rx";
290 pinctrl-names = "default";
291 pinctrl-0 = <&pinctrl_spi1>;
293 clock-names = "spi_clk";
298 compatible = "atmel,at91sam9g45-ssc";
303 dma-names = "tx", "rx";
304 pinctrl-names = "default";
305 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
307 clock-names = "pclk";
312 compatible = "atmel,sama5d3-adc";
315 pinctrl-names = "default";
316 pinctrl-0 = <
333 clock-names = "adc_clk", "adc_op_clk";
334 atmel,adc-channels-used = <0xfff>;
335 atmel,adc-startup-time = <40>;
336 atmel,adc-use-external-triggers;
337 atmel,adc-vref = <3000>;
338 atmel,adc-sample-hold-time = <11>;
343 compatible = "atmel,at91sam9x5-i2c";
348 dma-names = "tx", "rx";
349 pinctrl-names = "default", "gpio";
350 pinctrl-0 = <&pinctrl_i2c2>;
351 pinctrl-1 = <&pinctrl_i2c2_gpio>;
352 sda-gpios = <&pioA 18 GPIO_ACTIVE_HIGH>;
353 scl-gpios = <&pioA 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
354 #address-cells = <1>;
355 #size-cells = <0>;
361 compatible = "atmel,at91sam9260-usart";
363 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
367 dma-names = "tx", "rx";
368 pinctrl-names = "default";
369 pinctrl-0 = <&pinctrl_usart2>;
371 clock-names = "usart";
376 compatible = "atmel,at91sam9260-usart";
378 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
382 dma-names = "tx", "rx";
383 pinctrl-names = "default";
384 pinctrl-0 = <&pinctrl_usart3>;
386 clock-names = "usart";
390 sha: crypto@f8034000 { label
391 compatible = "atmel,at91sam9g46-sha";
395 dma-names = "tx";
397 clock-names = "sha_clk";
401 compatible = "atmel,at91sam9g46-aes";
406 dma-names = "tx", "rx";
408 clock-names = "aes_clk";
412 compatible = "atmel,at91sam9g46-tdes";
417 dma-names = "tx", "rx";
419 clock-names = "tdes_clk";
423 compatible = "atmel,at91sam9g45-trng";
430 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
434 #address-cells = <1>;
435 #size-cells = <1>;
438 pmecc: ecc-engine@ffffc070 {
439 compatible = "atmel,at91sam9g45-pmecc";
445 dma0: dma-controller@ffffe600 {
446 compatible = "atmel,at91sam9g45-dma";
449 #dma-cells = <2>;
451 clock-names = "dma_clk";
454 dma1: dma-controller@ffffe800 {
455 compatible = "atmel,at91sam9g45-dma";
458 #dma-cells = <2>;
460 clock-names = "dma_clk";
464 compatible = "atmel,sama5d3-ddramc";
467 clock-names = "ddrck", "mpddr";
471 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
473 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
477 dma-names = "tx", "rx";
478 pinctrl-names = "default";
479 pinctrl-0 = <&pinctrl_dbgu>;
481 clock-names = "usart";
485 aic: interrupt-controller@fffff000 {
486 #interrupt-cells = <3>;
487 compatible = "atmel,sama5d3-aic";
488 interrupt-controller;
490 atmel,external-irqs = <47>;
494 #address-cells = <1>;
495 #size-cells = <1>;
496 compatible = "atmel,sama5d3-pinctrl", "simple-mfd";
498 atmel,mux-mask = <
564 pinctrl_dbgu: dbgu-0 {
572 pinctrl_ebi_addr: ebi-addr-0 {
599 pinctrl_ebi_nand_addr: ebi-addr-1 {
605 pinctrl_ebi_cs0: ebi-cs0-0 {
610 pinctrl_ebi_cs1: ebi-cs1-0 {
615 pinctrl_ebi_cs2: ebi-cs2-0 {
620 pinctrl_ebi_nwait: ebi-nwait-0 {
625 pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
632 pinctrl_i2c0: i2c0-0 {
638 pinctrl_i2c0_gpio: i2c0-gpio {
646 pinctrl_i2c1: i2c1-0 {
652 pinctrl_i2c1_gpio: i2c1-gpio {
660 pinctrl_i2c2: i2c2-0 {
666 pinctrl_i2c2_gpio: i2c2-gpio {
674 pinctrl_isi_data_0_7: isi-0-data-0-7 {
689 pinctrl_isi_data_8_9: isi-0-data-8-9 {
695 pinctrl_isi_data_10_11: isi-0-data-10-11 {
740 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
748 pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
752 pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
756 pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
760 pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
765 pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
769 pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
773 pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
777 pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
781 pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
785 pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
790 pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
794 pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
798 pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
802 pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
807 pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
811 pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
815 pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
819 pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
826 pinctrl_spi0: spi0-0 {
835 pinctrl_spi1: spi1-0 {
876 pinctrl_uart0: uart0-0 {
884 pinctrl_uart1: uart1-0 {
892 pinctrl_usart0: usart0-0 {
898 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
906 pinctrl_usart1: usart1-0 {
912 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
920 pinctrl_usart2: usart2-0 {
926 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
934 pinctrl_usart3: usart3-0 {
940 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
949 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
952 #gpio-cells = <2>;
953 gpio-controller;
954 interrupt-controller;
955 #interrupt-cells = <2>;
960 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
963 #gpio-cells = <2>;
964 gpio-controller;
965 interrupt-controller;
966 #interrupt-cells = <2>;
971 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
974 #gpio-cells = <2>;
975 gpio-controller;
976 interrupt-controller;
977 #interrupt-cells = <2>;
982 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
985 #gpio-cells = <2>;
986 gpio-controller;
987 interrupt-controller;
988 #interrupt-cells = <2>;
993 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
996 #gpio-cells = <2>;
997 gpio-controller;
998 interrupt-controller;
999 #interrupt-cells = <2>;
1004 pmc: clock-controller@fffffc00 {
1005 compatible = "atmel,sama5d3-pmc", "syscon";
1008 #clock-cells = <2>;
1010 clock-names = "slow_clk", "main_xtal";
1013 reset_controller: reset-controller@fffffe00 {
1014 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
1020 compatible = "atmel,at91sam9x5-shdwc";
1026 compatible = "atmel,at91sam9260-pit";
1033 compatible = "atmel,at91sam9260-wdt";
1037 atmel,watchdog-type = "hardware";
1038 atmel,reset-type = "all";
1039 atmel,dbg-halt;
1043 clk32k: clock-controller@fffffe50 {
1044 compatible = "atmel,sama5d3-sckc";
1047 #clock-cells = <0>;
1051 compatible = "atmel,at91rm9200-rtc";
1059 compatible = "mmio-sram";
1060 no-memory-wc;
1062 #address-cells = <1>;
1063 #size-cells = <1>;
1068 compatible = "atmel,sama5d3-udc";
1073 clock-names = "pclk", "hclk";
1078 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1082 clock-names = "ohci_clk", "hclk", "uhpck";
1087 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1091 clock-names = "usb_clk", "ehci_clk";
1096 compatible = "atmel,sama5d3-ebi";
1097 #address-cells = <2>;
1098 #size-cells = <1>;
1109 nand_controller: nand-controller {
1110 compatible = "atmel,sama5d3-nand-controller";
1111 atmel,nfc-sram = <&nfc_sram>;
1112 atmel,nfc-io = <&nfc_io>;
1113 ecc-engine = <&pmecc>;
1114 #address-cells = <2>;
1115 #size-cells = <1>;
1121 nfc_io: nfc-io@70000000 {
1122 compatible = "atmel,sama5d3-nfc-io", "syscon";