Lines Matching +full:at91rm9200 +full:- +full:rtc
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
9 #include <dt-bindings/dma/at91.h>
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
14 #include <dt-bindings/mfd/at91-usart.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
21 interrupt-parent = <&aic>;
41 #address-cells = <1>;
42 #size-cells = <0>;
45 compatible = "arm,arm926ej-s";
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <0>;
64 compatible = "fixed-clock";
65 #clock-cells = <0>;
66 clock-frequency = <0>;
71 compatible = "mmio-sram";
73 #address-cells = <1>;
74 #size-cells = <1>;
79 compatible = "simple-bus";
80 #address-cells = <1>;
81 #size-cells = <1>;
85 compatible = "simple-bus";
86 #address-cells = <1>;
87 #size-cells = <1>;
90 aic: interrupt-controller@fffff000 {
91 #interrupt-cells = <3>;
92 compatible = "atmel,at91rm9200-aic";
93 interrupt-controller;
95 atmel,external-irqs = <31>;
99 compatible = "atmel,at91sam9n12-matrix", "syscon";
103 pmecc: ecc-engine@ffffe000 {
104 compatible = "atmel,at91sam9g45-pmecc";
110 compatible = "atmel,at91sam9g45-ddramc";
113 clock-names = "ddrck";
117 compatible = "atmel,at91sam9260-smc", "syscon";
121 pmc: clock-controller@fffffc00 {
122 compatible = "atmel,at91sam9n12-pmc", "syscon";
124 #clock-cells = <2>;
126 clock-names = "slow_clk", "main_xtal";
130 reset-controller@fffffe00 {
131 compatible = "atmel,at91sam9g45-rstc";
137 compatible = "atmel,at91sam9260-pit";
144 compatible = "atmel,at91sam9x5-shdwc";
149 clk32k: clock-controller@fffffe50 {
150 compatible = "atmel,at91sam9x5-sckc";
153 #clock-cells = <0>;
161 dma-names = "rxtx";
163 clock-names = "mci_clk";
164 #address-cells = <1>;
165 #size-cells = <0>;
170 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
171 #address-cells = <1>;
172 #size-cells = <0>;
176 clock-names = "t0_clk", "slow_clk";
180 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
181 #address-cells = <1>;
182 #size-cells = <0>;
186 clock-names = "t0_clk", "slow_clk";
190 compatible = "atmel,at91sam9n12-hlcdc";
194 clock-names = "periph_clk", "sys_clk", "slow_clk";
197 hlcdc-display-controller {
198 compatible = "atmel,hlcdc-display-controller";
199 #address-cells = <1>;
200 #size-cells = <0>;
203 #address-cells = <1>;
204 #size-cells = <0>;
209 hlcdc_pwm: hlcdc-pwm {
210 compatible = "atmel,hlcdc-pwm";
211 pinctrl-names = "default";
212 pinctrl-0 = <&pinctrl_lcd_pwm>;
213 #pwm-cells = <3>;
217 dma: dma-controller@ffffec00 {
218 compatible = "atmel,at91sam9g45-dma";
221 #dma-cells = <2>;
223 clock-names = "dma_clk";
227 #address-cells = <1>;
228 #size-cells = <1>;
229 compatible = "atmel,at91sam9x5-pinctrl", "simple-mfd";
232 atmel,mux-mask = <
242 pinctrl_dbgu: dbgu-0 {
250 pinctrl_lcd_base: lcd-base-0 {
259 pinctrl_lcd_pwm: lcd-pwm-0 {
263 pinctrl_lcd_rgb888: lcd-rgb-3 {
293 pinctrl_usart0: usart0-0 {
299 pinctrl_usart0_rts: usart0_rts-0 {
304 pinctrl_usart0_cts: usart0_cts-0 {
311 pinctrl_usart1: usart1-0 {
319 pinctrl_usart2: usart2-0 {
325 pinctrl_usart2_rts: usart2_rts-0 {
330 pinctrl_usart2_cts: usart2_cts-0 {
337 pinctrl_usart3: usart3-0 {
343 pinctrl_usart3_rts: usart3_rts-0 {
348 pinctrl_usart3_cts: usart3_cts-0 {
355 pinctrl_uart0: uart0-0 {
363 pinctrl_uart1: uart1-0 {
371 pinctrl_nand_rb: nand-rb-0 {
376 pinctrl_nand_cs: nand-cs-0 {
383 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
390 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
397 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
407 pinctrl_ssc0_tx: ssc0_tx-0 {
414 pinctrl_ssc0_rx: ssc0_rx-0 {
423 pinctrl_spi0: spi0-0 {
432 pinctrl_spi1: spi1-0 {
441 pinctrl_i2c0: i2c0-0 {
449 pinctrl_i2c1: i2c1-0 {
457 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
461 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
465 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
469 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
473 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
477 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
481 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
485 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
489 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
495 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
499 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
503 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
507 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
511 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
515 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
519 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
523 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
527 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
533 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
536 #gpio-cells = <2>;
537 gpio-controller;
538 interrupt-controller;
539 #interrupt-cells = <2>;
544 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
547 #gpio-cells = <2>;
548 gpio-controller;
549 interrupt-controller;
550 #interrupt-cells = <2>;
555 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
558 #gpio-cells = <2>;
559 gpio-controller;
560 interrupt-controller;
561 #interrupt-cells = <2>;
566 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
569 #gpio-cells = <2>;
570 gpio-controller;
571 interrupt-controller;
572 #interrupt-cells = <2>;
578 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
580 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
582 pinctrl-names = "default";
583 pinctrl-0 = <&pinctrl_dbgu>;
585 clock-names = "usart";
590 compatible = "atmel,at91sam9g45-ssc";
595 dma-names = "tx", "rx";
596 pinctrl-names = "default";
597 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
599 clock-names = "pclk";
604 compatible = "atmel,at91sam9260-usart";
606 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
608 pinctrl-names = "default";
609 pinctrl-0 = <&pinctrl_usart0>;
611 clock-names = "usart";
616 compatible = "atmel,at91sam9260-usart";
618 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
620 pinctrl-names = "default";
621 pinctrl-0 = <&pinctrl_usart1>;
623 clock-names = "usart";
628 compatible = "atmel,at91sam9260-usart";
630 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
632 pinctrl-names = "default";
633 pinctrl-0 = <&pinctrl_usart2>;
635 clock-names = "usart";
640 compatible = "atmel,at91sam9260-usart";
642 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
644 pinctrl-names = "default";
645 pinctrl-0 = <&pinctrl_usart3>;
647 clock-names = "usart";
652 compatible = "atmel,at91sam9x5-i2c";
657 dma-names = "tx", "rx";
658 #address-cells = <1>;
659 #size-cells = <0>;
660 pinctrl-names = "default";
661 pinctrl-0 = <&pinctrl_i2c0>;
667 compatible = "atmel,at91sam9x5-i2c";
672 dma-names = "tx", "rx";
673 #address-cells = <1>;
674 #size-cells = <0>;
675 pinctrl-names = "default";
676 pinctrl-0 = <&pinctrl_i2c1>;
682 #address-cells = <1>;
683 #size-cells = <0>;
684 compatible = "atmel,at91rm9200-spi";
689 dma-names = "tx", "rx";
690 pinctrl-names = "default";
691 pinctrl-0 = <&pinctrl_spi0>;
693 clock-names = "spi_clk";
698 #address-cells = <1>;
699 #size-cells = <0>;
700 compatible = "atmel,at91rm9200-spi";
705 dma-names = "tx", "rx";
706 pinctrl-names = "default";
707 pinctrl-0 = <&pinctrl_spi1>;
709 clock-names = "spi_clk";
714 compatible = "atmel,at91sam9260-wdt";
718 atmel,watchdog-type = "hardware";
719 atmel,reset-type = "all";
720 atmel,dbg-halt;
724 rtc@fffffeb0 {
725 compatible = "atmel,at91rm9200-rtc";
733 compatible = "atmel,at91sam9rl-pwm";
736 #pwm-cells = <3>;
742 compatible = "atmel,at91sam9260-udc";
746 clock-names = "pclk", "hclk";
752 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
756 clock-names = "ohci_clk", "hclk", "uhpck";
761 compatible = "atmel,at91sam9x5-ebi";
762 #address-cells = <2>;
763 #size-cells = <1>;
776 nand_controller: nand-controller {
777 compatible = "atmel,at91sam9g45-nand-controller";
778 ecc-engine = <&pmecc>;
779 #address-cells = <2>;
780 #size-cells = <1>;
787 i2c-gpio-0 {
788 compatible = "i2c-gpio";
792 i2c-gpio,sda-open-drain;
793 i2c-gpio,scl-open-drain;
794 i2c-gpio,delay-us = <2>; /* ~100 kHz */
795 #address-cells = <1>;
796 #size-cells = <0>;