Lines Matching +full:at91rm9200 +full:- +full:gpio
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/mfd/at91-usart.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
23 interrupt-parent = <&aic>;
45 #address-cells = <1>;
46 #size-cells = <0>;
49 compatible = "arm,arm926ej-s";
62 compatible = "fixed-clock";
63 #clock-cells = <0>;
64 clock-frequency = <0>;
68 compatible = "fixed-clock";
69 #clock-cells = <0>;
70 clock-frequency = <0>;
74 compatible = "fixed-clock";
75 #clock-cells = <0>;
76 clock-frequency = <300000>;
81 compatible = "mmio-sram";
83 #address-cells = <1>;
84 #size-cells = <1>;
89 compatible = "simple-bus";
90 #address-cells = <1>;
91 #size-cells = <1>;
95 compatible = "simple-bus";
96 #address-cells = <1>;
97 #size-cells = <1>;
100 aic: interrupt-controller@fffff000 {
101 #interrupt-cells = <3>;
102 compatible = "atmel,at91rm9200-aic";
103 interrupt-controller;
105 atmel,external-irqs = <31>;
109 compatible = "atmel,at91sam9g45-ddramc";
112 clock-names = "ddrck";
116 compatible = "atmel,at91sam9g45-ddramc";
119 clock-names = "ddrck";
123 compatible = "atmel,at91sam9260-smc", "syscon";
128 compatible = "atmel,at91sam9g45-matrix", "syscon";
132 pmc: clock-controller@fffffc00 {
133 compatible = "atmel,at91sam9g45-pmc", "syscon";
136 #clock-cells = <2>;
138 clock-names = "slow_clk", "main_xtal";
141 reset-controller@fffffd00 {
142 compatible = "atmel,at91sam9g45-rstc";
148 compatible = "atmel,at91sam9260-pit";
156 compatible = "atmel,at91sam9rl-shdwc";
162 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
163 #address-cells = <1>;
164 #size-cells = <0>;
168 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
172 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
173 #address-cells = <1>;
174 #size-cells = <0>;
178 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
181 dma: dma-controller@ffffec00 {
182 compatible = "atmel,at91sam9g45-dma";
185 #dma-cells = <2>;
187 clock-names = "dma_clk";
191 #address-cells = <1>;
192 #size-cells = <1>;
193 compatible = "atmel,at91rm9200-pinctrl", "simple-mfd";
196 atmel,mux-mask = <
207 pinctrl_ac97: ac97-0 {
247 pinctrl_dbgu: dbgu-0 {
255 pinctrl_i2c0: i2c0-0 {
263 pinctrl_i2c1: i2c1-0 {
271 pinctrl_isi_data_0_7: isi-0-data-0-7 {
286 pinctrl_isi_data_8_9: isi-0-data-8-9 {
292 pinctrl_isi_data_10_11: isi-0-data-10-11 {
300 pinctrl_usart0: usart0-0 {
306 pinctrl_usart0_rts: usart0_rts-0 {
311 pinctrl_usart0_cts: usart0_cts-0 {
318 pinctrl_usart1: usart1-0 {
324 pinctrl_usart1_rts: usart1_rts-0 {
329 pinctrl_usart1_cts: usart1_cts-0 {
336 pinctrl_usart2: usart2-0 {
342 pinctrl_usart2_rts: usart2_rts-0 {
347 pinctrl_usart2_cts: usart2_cts-0 {
354 pinctrl_usart3: usart3-0 {
360 pinctrl_usart3_rts: usart3_rts-0 {
365 pinctrl_usart3_cts: usart3_cts-0 {
372 pinctrl_nand_rb: nand-rb-0 {
377 pinctrl_nand_cs: nand-cs-0 {
384 pinctrl_macb_rmii: macb_rmii-0 {
398 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
412 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
419 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
426 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
436 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
443 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
450 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
460 pinctrl_ssc0_tx: ssc0_tx-0 {
467 pinctrl_ssc0_rx: ssc0_rx-0 {
476 pinctrl_ssc1_tx: ssc1_tx-0 {
483 pinctrl_ssc1_rx: ssc1_rx-0 {
492 pinctrl_spi0: spi0-0 {
501 pinctrl_spi1: spi1-0 {
510 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
514 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
518 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
522 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
526 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
530 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
534 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
538 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
542 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
548 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
552 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
556 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
560 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
564 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
568 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
572 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
576 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
580 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
586 pinctrl_fb: fb-0 {
621 pioA: gpio@fffff200 {
622 compatible = "atmel,at91rm9200-gpio";
625 #gpio-cells = <2>;
626 gpio-controller;
627 interrupt-controller;
628 #interrupt-cells = <2>;
632 pioB: gpio@fffff400 {
633 compatible = "atmel,at91rm9200-gpio";
636 #gpio-cells = <2>;
637 gpio-controller;
638 interrupt-controller;
639 #interrupt-cells = <2>;
643 pioC: gpio@fffff600 {
644 compatible = "atmel,at91rm9200-gpio";
647 #gpio-cells = <2>;
648 gpio-controller;
649 interrupt-controller;
650 #interrupt-cells = <2>;
654 pioD: gpio@fffff800 {
655 compatible = "atmel,at91rm9200-gpio";
658 #gpio-cells = <2>;
659 gpio-controller;
660 interrupt-controller;
661 #interrupt-cells = <2>;
665 pioE: gpio@fffffa00 {
666 compatible = "atmel,at91rm9200-gpio";
669 #gpio-cells = <2>;
670 gpio-controller;
671 interrupt-controller;
672 #interrupt-cells = <2>;
678 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
679 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
682 pinctrl-names = "default";
683 pinctrl-0 = <&pinctrl_dbgu>;
685 clock-names = "usart";
690 compatible = "atmel,at91sam9260-usart";
692 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
694 atmel,use-dma-rx;
695 atmel,use-dma-tx;
696 pinctrl-names = "default";
697 pinctrl-0 = <&pinctrl_usart0>;
699 clock-names = "usart";
704 compatible = "atmel,at91sam9260-usart";
706 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
708 atmel,use-dma-rx;
709 atmel,use-dma-tx;
710 pinctrl-names = "default";
711 pinctrl-0 = <&pinctrl_usart1>;
713 clock-names = "usart";
718 compatible = "atmel,at91sam9260-usart";
720 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
722 atmel,use-dma-rx;
723 atmel,use-dma-tx;
724 pinctrl-names = "default";
725 pinctrl-0 = <&pinctrl_usart2>;
727 clock-names = "usart";
732 compatible = "atmel,at91sam9260-usart";
734 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
736 atmel,use-dma-rx;
737 atmel,use-dma-tx;
738 pinctrl-names = "default";
739 pinctrl-0 = <&pinctrl_usart3>;
741 clock-names = "usart";
746 compatible = "cdns,at91sam9260-macb", "cdns,macb";
749 pinctrl-names = "default";
750 pinctrl-0 = <&pinctrl_macb_rmii>;
752 clock-names = "hclk", "pclk";
757 compatible = "atmel,at91sam9g45-trng";
764 compatible = "atmel,at91sam9g10-i2c";
767 pinctrl-names = "default";
768 pinctrl-0 = <&pinctrl_i2c0>;
769 #address-cells = <1>;
770 #size-cells = <0>;
776 compatible = "atmel,at91sam9g10-i2c";
779 pinctrl-names = "default";
780 pinctrl-0 = <&pinctrl_i2c1>;
781 #address-cells = <1>;
782 #size-cells = <0>;
788 compatible = "atmel,at91sam9g45-ssc";
791 pinctrl-names = "default";
792 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
794 clock-names = "pclk";
799 compatible = "atmel,at91sam9g45-ssc";
802 pinctrl-names = "default";
803 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
805 clock-names = "pclk";
810 compatible = "atmel,at91sam9263-ac97c";
813 pinctrl-names = "default";
814 pinctrl-0 = <&pinctrl_ac97>;
816 clock-names = "ac97_clk";
821 compatible = "atmel,at91sam9g45-adc";
825 clock-names = "adc_clk", "adc_op_clk";
826 atmel,adc-channels-used = <0xff>;
827 atmel,adc-vref = <3300>;
828 atmel,adc-startup-time = <40>;
832 compatible = "atmel,at91sam9g45-isi";
836 clock-names = "isi_clk";
839 #address-cells = <1>;
840 #size-cells = <0>;
845 compatible = "atmel,at91sam9rl-pwm";
848 #pwm-cells = <3>;
858 dma-names = "rxtx";
859 #address-cells = <1>;
860 #size-cells = <0>;
862 clock-names = "mci_clk";
871 dma-names = "rxtx";
872 #address-cells = <1>;
873 #size-cells = <0>;
875 clock-names = "mci_clk";
880 compatible = "atmel,at91sam9260-wdt";
884 atmel,watchdog-type = "hardware";
885 atmel,reset-type = "all";
886 atmel,dbg-halt;
891 #address-cells = <1>;
892 #size-cells = <0>;
893 compatible = "atmel,at91rm9200-spi";
896 pinctrl-names = "default";
897 pinctrl-0 = <&pinctrl_spi0>;
899 clock-names = "spi_clk";
904 #address-cells = <1>;
905 #size-cells = <0>;
906 compatible = "atmel,at91rm9200-spi";
909 pinctrl-names = "default";
910 pinctrl-0 = <&pinctrl_spi1>;
912 clock-names = "spi_clk";
917 compatible = "atmel,at91sam9g45-udc";
922 clock-names = "pclk", "hclk";
926 clk32k: clock-controller@fffffd50 {
927 compatible = "atmel,at91sam9x5-sckc";
930 #clock-cells = <0>;
934 compatible = "atmel,at91sam9260-rtt";
942 compatible = "atmel,at91rm9200-rtc";
950 compatible = "atmel,at91sam9260-gpbr", "syscon";
957 compatible = "atmel,at91sam9g45-lcdc";
960 pinctrl-names = "default";
961 pinctrl-0 = <&pinctrl_fb>;
963 clock-names = "hclk", "lcdc_clk";
968 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
972 clock-names = "ohci_clk", "hclk", "uhpck";
977 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
981 clock-names = "usb_clk", "ehci_clk";
986 compatible = "atmel,at91sam9g45-ebi";
987 #address-cells = <2>;
988 #size-cells = <1>;
1001 nand_controller: nand-controller {
1002 compatible = "atmel,at91sam9g45-nand-controller";
1003 #address-cells = <2>;
1004 #size-cells = <1>;
1011 i2c-gpio-0 {
1012 compatible = "i2c-gpio";
1016 i2c-gpio,sda-open-drain;
1017 i2c-gpio,scl-open-drain;
1018 i2c-gpio,delay-us = <5>; /* ~100 kHz */
1019 #address-cells = <1>;
1020 #size-cells = <0>;