Lines Matching +full:mt8135 +full:- +full:pwrap
1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt8135-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/mt8135-resets.h>
12 #include <dt-bindings/pinctrl/mt8135-pinfunc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 compatible = "mediatek,mt8135";
18 interrupt-parent = <&sysirq>;
20 cpu-map {
41 #address-cells = <1>;
42 #size-cells = <0>;
43 enable-method = "mediatek,mt81xx-tz-smp";
47 compatible = "arm,cortex-a7";
53 compatible = "arm,cortex-a7";
59 compatible = "arm,cortex-a15";
65 compatible = "arm,cortex-a15";
70 reserved-memory {
71 #address-cells = <2>;
72 #size-cells = <2>;
75 trustzone-bootinfo@80002000 {
76 compatible = "mediatek,trustzone-bootinfo";
82 #address-cells = <2>;
83 #size-cells = <2>;
84 compatible = "simple-bus";
88 compatible = "fixed-clock";
89 clock-frequency = <13000000>;
90 #clock-cells = <0>;
94 compatible = "fixed-clock";
95 clock-frequency = <32000>;
96 #clock-cells = <0>;
100 compatible = "fixed-clock";
101 #clock-cells = <0>;
102 clock-frequency = <26000000>;
107 compatible = "arm,armv7-timer";
108 interrupt-parent = <&gic>;
117 clock-frequency = <13000000>;
118 arm,cpu-registers-not-fw-configured;
122 #address-cells = <2>;
123 #size-cells = <2>;
124 compatible = "simple-bus";
128 compatible = "mediatek,mt8135-topckgen";
130 #clock-cells = <1>;
134 #reset-cells = <1>;
135 #clock-cells = <1>;
136 compatible = "mediatek,mt8135-infracfg", "syscon";
141 #reset-cells = <1>;
142 #clock-cells = <1>;
143 compatible = "mediatek,mt8135-pericfg", "syscon";
152 compatible = "mediatek,mt8135-pinctrl";
154 mediatek,pctl-regmap = <&syscfg_pctl_a &syscfg_pctl_b>;
155 gpio-controller;
156 #gpio-cells = <2>;
157 interrupt-controller;
158 #interrupt-cells = <2>;
165 compatible = "mediatek,mt8135-pctl-a-syscfg", "syscon";
170 compatible = "mediatek,mt8135-timer",
171 "mediatek,mt6577-timer";
175 clock-names = "system-clk", "rtc-clk";
178 pwrap: pwrap@1000f000 { label
179 compatible = "mediatek,mt8135-pwrap";
182 reg-names = "pwrap", "pwrap-bridge";
186 reset-names = "pwrap", "pwrap-bridge";
188 clock-names = "spi", "wrap";
191 sysirq: interrupt-controller@10200030 {
192 compatible = "mediatek,mt8135-sysirq",
193 "mediatek,mt6577-sysirq";
194 interrupt-controller;
195 #interrupt-cells = <3>;
196 interrupt-parent = <&gic>;
201 compatible = "mediatek,mt8135-apmixedsys";
203 #clock-cells = <1>;
207 compatible = "mediatek,mt8135-pctl-b-syscfg", "syscon";
211 gic: interrupt-controller@10211000 {
212 compatible = "arm,cortex-a15-gic";
213 interrupt-controller;
214 #interrupt-cells = <3>;
215 interrupt-parent = <&gic>;
223 compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
227 clock-names = "baud", "bus";
232 compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
236 clock-names = "baud", "bus";
241 compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
245 clock-names = "baud", "bus";
250 compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
254 clock-names = "baud", "bus";