Lines Matching +full:0 +full:x1400e000
22 reg = <0 0x13000000 0 0x200>;
29 reg = <0 0x13040000 0 0x30000>;
55 reg = <0 0x14000000 0 0x1000>;
62 reg = <0 0x14010000 0 0x1000>;
64 mediatek,larb-id = <0>;
74 reg = <0 0x16010000 0 0x1000>;
86 reg = <0 0x15001000 0 0x1000>;
99 reg = <0 0x15000000 0 0x1000>;
106 reg = <0 0x10205000 0 0x1000>;
117 reg = <0 0x15004000 0 0x1000>;
131 reg = <0 0x1000c000 0 0x1000>;
142 reg = <0 0x14007000 0 0x1000>;
151 reg = <0 0x14008000 0 0x1000>;
160 reg = <0 0x14009000 0 0x1000>;
169 reg = <0 0x1400a000 0 0x1000>;
180 reg = <0 0x1400b000 0 0x1000>;
188 reg = <0 0x1400c000 0 0x1000>;
202 reg = <0 0x1400e000 0 0x1000>;
210 reg = <0 0x14012000 0 0x1000>;
219 reg = <0 0x14014000 0 0x1000>;
231 reg = <0 0x14015000 0 0x400>;
239 mediatek,syscon-hdmi = <&mmsys 0x900>;
247 reg = <0 0x10010000 0 0x90>;
250 #clock-cells = <0>;
251 #phy-cells = <0>;
257 reg = <0 0x10012000 0 0xbc>;
266 reg = <0 0x10209100 0 0x24>;
270 #clock-cells = <0>;
271 #phy-cells = <0>;
279 reg = <0 0x11013000 0 0x1C>;