Lines Matching +full:gpio +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0
5 #define MFP_PIN_PXA300(gpio) \ argument
6 ((gpio <= 2) ? (0x00b4 + 4 * gpio) : \
7 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
8 (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) : \
9 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
10 0)
11 #define MFP_PIN_PXA300_2(gpio) \ argument
12 ((gpio <= 1) ? (0x674 + 4 * gpio) : \
13 (gpio <= 6) ? (0x2dc + 4 * gpio) : \
14 0)
16 #define MFP_PIN_PXA310(gpio) \ argument
17 ((gpio <= 2) ? (0x00b4 + 4 * gpio) : \
18 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
19 (gpio <= 29) ? (0x0400 + 4 * (gpio - 27)) : \
20 (gpio <= 98) ? (0x0418 + 4 * (gpio - 30)) : \
21 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
22 (gpio <= 262) ? 0 : \
23 (gpio <= 268) ? (0x052c + 4 * (gpio - 263)) : \
24 0)
25 #define MFP_PIN_PXA310_2(gpio) \ argument
26 ((gpio <= 1) ? (0x674 + 4 * gpio) : \
27 (gpio <= 6) ? (0x2dc + 4 * gpio) : \
28 (gpio <= 10) ? (0x52c + 4 * gpio) : \
29 0)
31 #define MFP_PIN_PXA320(gpio) \ argument
32 ((gpio <= 4) ? (0x0124 + 4 * gpio) : \
33 (gpio <= 9) ? (0x028c + 4 * (gpio - 5)) : \
34 (gpio <= 10) ? (0x0458 + 4 * (gpio - 10)) : \
35 (gpio <= 26) ? (0x02a0 + 4 * (gpio - 11)) : \
36 (gpio <= 48) ? (0x0400 + 4 * (gpio - 27)) : \
37 (gpio <= 62) ? (0x045c + 4 * (gpio - 49)) : \
38 (gpio <= 73) ? (0x04b4 + 4 * (gpio - 63)) : \
39 (gpio <= 98) ? (0x04f0 + 4 * (gpio - 74)) : \
40 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
41 0)
42 #define MFP_PIN_PXA320_2(gpio) \ argument
43 ((gpio <= 3) ? (0x674 + 4 * gpio) : \
44 (gpio <= 5) ? (0x284 + 4 * gpio) : \
45 0)
48 * MFP Alternate functions for pins having a gpio.
49 * Example of use: pinctrl-single,pins = < MFP_PIN_PXA310(21) MFP_AF1 >
51 #define MFP_AF0 (0 << 0)
52 #define MFP_AF1 (1 << 0)
53 #define MFP_AF2 (2 << 0)
54 #define MFP_AF3 (3 << 0)
55 #define MFP_AF4 (4 << 0)
56 #define MFP_AF5 (5 << 0)
57 #define MFP_AF6 (6 << 0)
61 * Example of use: pinctrl-single,drive-strength = MFP_DS03X;
63 #define MFP_DSMSK (0x7 << 10)
64 #define MFP_DS01X < (0x0 << 10) MFP_DSMSK >
65 #define MFP_DS02X < (0x1 << 10) MFP_DSMSK >
66 #define MFP_DS03X < (0x2 << 10) MFP_DSMSK >
67 #define MFP_DS04X < (0x3 << 10) MFP_DSMSK >
68 #define MFP_DS06X < (0x4 << 10) MFP_DSMSK >
69 #define MFP_DS08X < (0x5 << 10) MFP_DSMSK >
70 #define MFP_DS10X < (0x6 << 10) MFP_DSMSK >
71 #define MFP_DS13X < (0x7 << 10) MFP_DSMSK >
75 * Example of use: pinctrl-single,bias-pullup = MPF_PULL_UP;
77 #define MPF_PULL_MSK (0x7 << 13)
78 #define MPF_PULL_DOWN < (0x5 << 13) (0x5 << 13) 0 MPF_PULL_MSK >
79 #define MPF_PULL_UP < (0x6 << 13) (0x6 << 13) 0 MPF_PULL_MSK >
84 * pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW|MFP_LPM_EDGE_FALL);
87 * used in parentheses for don't-care values. Except for the float output,
89 * non-LPM pulled output, the same configuration could probably be used.
94 * Input 0 X(0) X(0) X(0) 0
95 * Drive 0 0 0 0 X(1) 0
96 * Drive 1 0 1 X(1) 0 0
97 * Pull hi (1) 1 X(1) 1 0 0
98 * Pull lo (0) 1 X(0) 0 1 0
99 * Z (float) 1 X(0) 0 0 0
103 #define MFP_LPM_MSK 0xe1f0
104 #define MFP_LPM_INPUT 0x0000
105 #define MFP_LPM_DRIVE_LOW 0x2000
106 #define MFP_LPM_DRIVE_HIGH 0x4100
107 #define MFP_LPM_PULL_LOW 0x2080
108 #define MFP_LPM_PULL_HIGH 0x4180
109 #define MFP_LPM_FLOAT 0x0080
111 #define MFP_LPM_EDGE_NONE 0x0000
112 #define MFP_LPM_EDGE_RISE 0x0010
113 #define MFP_LPM_EDGE_FALL 0x0020
114 #define MFP_LPM_EDGE_BOTH 0x0030
121 pdma: dma-controller@40000000 {
122 compatible = "marvell,pdma-1.0";
123 reg = <0x40000000 0x10000>;
125 #dma-cells = <2>;
127 #dma-channels = <32>;
128 dma-channels = <32>;
129 #dma-requests = <100>;
130 dma-requests = <100>;
136 reg = <0x40f500c0 0x30>;
139 #address-cells = <0x1>;
140 #size-cells = <0>;
144 nand_controller: nand-controller@43100000 {
145 compatible = "marvell,pxa3xx-nand-controller";
146 reg = <0x43100000 90>;
149 clock-names = "core";
151 dma-names = "data";
152 #address-cells = <1>;
153 #size-cells = <0>;
157 pxairq: interrupt-controller@40d00000 {
158 marvell,intc-priority;
159 marvell,intc-nr-irqs = <56>;
163 compatible = "pinconf-single";
164 reg = <0x40e10000 0xffff>;
165 #pinctrl-cells = <1>;
166 pinctrl-single,register-width = <32>;
167 pinctrl-single,function-mask = <0x7>;
170 gpio: gpio@40e00000 { label
171 compatible = "intel,pxa3xx-gpio";
172 reg = <0x40e00000 0x10000>;
174 gpio-ranges = <&pinctrl 0 0 128>;
175 interrupt-names = "gpio0", "gpio1", "gpio_mux";
177 gpio-controller;
178 #gpio-cells = <0x2>;
179 interrupt-controller;
180 #interrupt-cells = <0x2>;
184 compatible = "marvell,pxa-mmc";
185 reg = <0x41100000 0x1000>;
190 dma-names = "rx", "tx";
195 compatible = "marvell,pxa-mmc";
196 reg = <0x42000000 0x1000>;
201 dma-names = "rx", "tx";
206 compatible = "marvell,pxa-mmc";
207 reg = <0x42500000 0x1000>;
212 dma-names = "rx", "tx";
217 compatible = "marvell,pxa-ohci";
218 reg = <0x4c000000 0x10000>;
225 compatible = "marvell,pxa270-pwm";
226 reg = <0x40b00000 0x10>;
227 #pwm-cells = <1>;
233 compatible = "marvell,pxa270-pwm";
234 reg = <0x40b00010 0x10>;
235 #pwm-cells = <1>;
241 compatible = "marvell,pxa270-pwm";
242 reg = <0x40c00000 0x10>;
243 #pwm-cells = <1>;
249 compatible = "marvell,pxa270-pwm";
250 reg = <0x40c00010 0x10>;
251 #pwm-cells = <1>;
257 compatible = "mrvl,pxa3xx-ssp";
258 reg = <0x41000000 0x40>;
265 compatible = "mrvl,pxa3xx-ssp";
266 reg = <0x41700000 0x40>;
273 compatible = "mrvl,pxa3xx-ssp";
274 reg = <0x41900000 0x40>;
275 interrupts = <0>;
281 compatible = "mrvl,pxa3xx-ssp";
282 reg = <0x41a00000 0x40>;
289 compatible = "marvell,pxa-timer";
290 reg = <0x40a00000 0x20>;
296 gcu: display-controller@54000000 {
297 compatible = "marvell,pxa300-gcu";
298 reg = <0x54000000 0x1000>;
310 #address-cells = <1>;
311 #size-cells = <1>;
315 compatible = "marvell,pxa300-clocks";
316 #clock-cells = <1>;