Lines Matching +full:0 +full:xc8003000

19 		 * windows in the 256MB space from 0x50000000 to 0x5fffffff.
26 			ranges = <0 0x0 0x50000000 0x01000000>,
27 				 <1 0x0 0x51000000 0x01000000>,
28 				 <2 0x0 0x52000000 0x01000000>,
29 				 <3 0x0 0x53000000 0x01000000>,
30 				 <4 0x0 0x54000000 0x01000000>,
31 				 <5 0x0 0x55000000 0x01000000>,
32 				 <6 0x0 0x56000000 0x01000000>,
33 				 <7 0x0 0x57000000 0x01000000>;
34 			dma-ranges = <0 0x0 0x50000000 0x01000000>,
35 				 <1 0x0 0x51000000 0x01000000>,
36 				 <2 0x0 0x52000000 0x01000000>,
37 				 <3 0x0 0x53000000 0x01000000>,
38 				 <4 0x0 0x54000000 0x01000000>,
39 				 <5 0x0 0x55000000 0x01000000>,
40 				 <6 0x0 0x56000000 0x01000000>,
41 				 <7 0x0 0x57000000 0x01000000>;
46 			reg = <0x60000000 0x4000>;
52 			reg = <0xc0000000 0x1000>;
59 			bus-range = <0x00 0xff>;
64 			 * 64MB 32bit non-prefetchable memory 0x48000000-0x4bffffff
67 			<0x02000000 0 0x48000000 0x48000000 0 0x04000000>,
68 			/* 64KB I/O space at 0x4c000000 */
69 			<0x01000000 0 0x00000000 0x4c000000 0 0x00010000>;
76 			 * than at 0x0 you need to alter this.
79 			<0x02000000 0 0x00000000 0x00000000 0 0x04000000>;
86 			reg = <0xc8000000 0x1000>;
100 			reg = <0xc8001000 0x1000>;
114 			reg = <0xc8004000 0x1000>;
128 			reg = <0xc8003000 0x100>;
135 			reg = <0xc8005000 0x100>;
141 			reg = <0xc8006000 0x1000>, <0xc8007000 0x1000>, <0xc8008000 0x1000>;
143 			#size-cells = <0>;
146 			hss@0 {
148 				reg = <0>;
149 				intel,npe-handle = <&npe 0>;
156 				intel,npe-handle = <&npe 0>;
172 			reg = <0xc8009000 0x1000>;
183 			reg = <0xc800a000 0x1000>;
186 			queue-rx = <&qmgr 0>;
187 			queue-txready = <&qmgr 0>;
194 			reg = <0xc800c000 0x1000>;
196 			intel,npe = <0>;
198 			queue-rx = <&qmgr 0>;
199 			queue-txready = <&qmgr 0>;