Lines Matching +full:0 +full:x80840008
18 reg = <0x80930000 0x1000>;
101 reg = <0x80900000 0x28>;
110 * windows in the 256MB space from 0x50000000 to 0x5fffffff.
116 reg = <0x80080000 0x20>;
125 reg = <0x80000000 0x0040>,
126 <0x80000040 0x0040>,
127 <0x80000080 0x0040>,
128 <0x800000c0 0x0040>,
129 <0x80000240 0x0040>,
130 <0x80000200 0x0040>,
131 <0x800002c0 0x0040>,
132 <0x80000280 0x0040>,
133 <0x80000340 0x0040>,
134 <0x80000300 0x0040>;
158 reg = <0x80000100 0x0040>,
159 <0x80000140 0x0040>;
170 reg = <0x80010000 0x10000>;
175 #size-cells = <0>;
181 reg = <0x80840000 0x04>,
182 <0x80840010 0x04>,
183 <0x80840090 0x1c>;
195 reg = <0x80840004 0x04>,
196 <0x80840014 0x04>,
197 <0x808400ac 0x1c>;
209 reg = <0x80840008 0x04>,
210 <0x80840018 0x04>;
215 pinctrl-0 = <&gpio2_default_pins>;
220 reg = <0x8084000c 0x04>,
221 <0x8084001c 0x04>;
226 pinctrl-0 = <&gpio3_default_pins>;
231 reg = <0x80840020 0x04>,
232 <0x80840024 0x04>;
237 pinctrl-0 = <&gpio4_default_pins>;
242 reg = <0x80840030 0x04>,
243 <0x80840034 0x04>,
244 <0x8084004c 0x1c>;
258 reg = <0x80840038 0x04>,
259 <0x8084003c 0x04>;
264 pinctrl-0 = <&gpio6_default_pins>;
269 reg = <0x80840040 0x04>,
270 <0x80840044 0x04>;
275 pinctrl-0 = <&gpio7_default_pins>;
280 reg = <0x80820000 0x100>;
281 #sound-dai-cells = <0>;
288 dmas = <&dma0 0 1>, <&dma0 0 2>;
295 reg = <0x800a0000 0x38>;
299 pinctrl-0 = <&ide_default_pins>;
305 reg = <0x800b0000 0x1000>;
308 valid-mask = <0x7ffffffc>;
309 valid-wakeup-mask = <0x0>;
314 reg = <0x800c0000 0x1000>;
317 valid-mask = <0x1fffffff>;
318 valid-wakeup-mask = <0x0>;
323 reg = <0x800f0000 0x0c>;
328 pinctrl-0 = <&keypad_default_pins>;
349 reg = <0x80910000 0x10>;
357 reg = <0x80910020 0x10>;
361 pinctrl-0 = <&pwm1_default_pins>;
367 reg = <0x80920000 0x100>;
372 reg = <0x808a0000 0x18>;
374 #size-cells = <0>;
379 pinctrl-0 = <&spi_default_pins>;
385 reg = <0x80810000 0x100>;
392 reg = <0x808c0000 0x1000>;
393 arm,primecell-periphid = <0x00041010>;
403 reg = <0x808d0000 0x1000>;
404 arm,primecell-periphid = <0x00041010>;
414 reg = <0x808b0000 0x1000>;
415 arm,primecell-periphid = <0x00041010>;
425 reg = <0x80020000 0x10000>;
434 reg = <0x80940000 0x08>;
440 #clock-cells = <0>;