Lines Matching +full:nand +full:- +full:cache
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
24 next-level-cache = <&L2_0>;
25 enable-method = "psci";
30 compatible = "arm,cortex-a7";
32 next-level-cache = <&L2_0>;
33 enable-method = "psci";
36 L2_0: l2-cache0 {
37 compatible = "cache";
38 cache-level = <2>;
39 cache-unified;
44 compatible = "arm,armv7-timer";
49 arm,cpu-registers-not-fw-configured;
53 compatible = "arm,cortex-a7-pmu";
56 interrupt-affinity = <&CA7_0>, <&CA7_1>;
60 periph_clk: periph-clk {
61 compatible = "fixed-clock";
62 #clock-cells = <0>;
63 clock-frequency = <200000000>;
66 uart_clk: uart-clk {
67 compatible = "fixed-factor-clock";
68 #clock-cells = <0>;
70 clock-div = <4>;
71 clock-mult = <1>;
74 hsspi_pll: hsspi-pll {
75 compatible = "fixed-clock";
76 #clock-cells = <0>;
77 clock-frequency = <200000000>;
82 compatible = "arm,psci-0.2";
87 compatible = "simple-bus";
88 #address-cells = <1>;
89 #size-cells = <1>;
92 gic: interrupt-controller@1000 {
93 compatible = "arm,cortex-a7-gic";
94 #interrupt-cells = <3>;
95 interrupt-controller;
106 compatible = "simple-bus";
107 #address-cells = <1>;
108 #size-cells = <1>;
112 compatible = "brcm,bcm6345-wdt";
117 compatible = "brcm,bcm6345-wdt";
124 compatible = "brcm,bcm6345-gpio";
126 reg-names = "dirout", "dat";
127 gpio-controller;
128 #gpio-cells = <2>;
134 compatible = "brcm,bcm6345-gpio";
136 reg-names = "dirout", "dat";
137 gpio-controller;
138 #gpio-cells = <2>;
144 compatible = "brcm,bcm6345-gpio";
146 reg-names = "dirout", "dat";
147 gpio-controller;
148 #gpio-cells = <2>;
154 compatible = "brcm,bcm6345-gpio";
156 reg-names = "dirout", "dat";
157 gpio-controller;
158 #gpio-cells = <2>;
164 compatible = "brcm,bcm6345-gpio";
166 reg-names = "dirout", "dat";
167 gpio-controller;
168 #gpio-cells = <2>;
174 compatible = "brcm,bcm6345-gpio";
176 reg-names = "dirout", "dat";
177 gpio-controller;
178 #gpio-cells = <2>;
184 compatible = "brcm,bcm6345-gpio";
186 reg-names = "dirout", "dat";
187 gpio-controller;
188 #gpio-cells = <2>;
194 compatible = "brcm,bcm6345-gpio";
196 reg-names = "dirout", "dat";
197 gpio-controller;
198 #gpio-cells = <2>;
203 compatible = "brcm,iproc-rng200";
208 leds: led-controller@700 {
209 #address-cells = <1>;
210 #size-cells = <0>;
211 compatible = "brcm,bcm63138-leds";
217 #address-cells = <1>;
218 #size-cells = <0>;
219 compatible = "brcm,bcm6878-hsspi", "brcm,bcmbca-hsspi-v1.0";
223 clock-names = "hsspi", "pll";
224 num-cs = <8>;
228 nand_controller: nand-controller@1800 {
229 #address-cells = <1>;
230 #size-cells = <0>;
231 compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
233 reg-names = "nand", "nand-int-base";
236 nandcs: nand@0 {
242 pl081_dma: dma-controller@11000 {
245 arm,primecell-periphid = <0x00041081>;
248 memcpy-burst-size = <256>;
249 memcpy-bus-width = <32>;
251 clock-names = "apb_pclk";
252 #dma-cells = <2>;
260 clock-names = "uartclk", "apb_pclk";