Lines Matching +full:nand +full:- +full:cache
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
24 next-level-cache = <&L2_0>;
25 enable-method = "psci";
30 compatible = "arm,cortex-a7";
32 next-level-cache = <&L2_0>;
33 enable-method = "psci";
38 compatible = "arm,cortex-a7";
40 next-level-cache = <&L2_0>;
41 enable-method = "psci";
44 L2_0: l2-cache0 {
45 compatible = "cache";
46 cache-level = <2>;
47 cache-unified;
52 compatible = "arm,armv7-timer";
57 arm,cpu-registers-not-fw-configured;
61 compatible = "arm,cortex-a7-pmu";
65 interrupt-affinity = <&CA7_0>, <&CA7_1>,
70 periph_clk: periph-clk {
71 compatible = "fixed-clock";
72 #clock-cells = <0>;
73 clock-frequency = <200000000>;
76 uart_clk: uart-clk {
77 compatible = "fixed-factor-clock";
78 #clock-cells = <0>;
80 clock-div = <4>;
81 clock-mult = <1>;
84 hsspi_pll: hsspi-pll {
85 compatible = "fixed-clock";
86 #clock-cells = <0>;
87 clock-frequency = <200000000>;
92 compatible = "arm,psci-0.2";
97 compatible = "simple-bus";
98 #address-cells = <1>;
99 #size-cells = <1>;
102 gic: interrupt-controller@1000 {
103 compatible = "arm,cortex-a7-gic";
104 #interrupt-cells = <3>;
105 interrupt-controller;
115 compatible = "simple-bus";
116 #address-cells = <1>;
117 #size-cells = <1>;
121 compatible = "brcm,bcm6345-wdt";
127 compatible = "brcm,bcm6345-gpio";
129 reg-names = "dirout", "dat";
130 gpio-controller;
131 #gpio-cells = <2>;
137 compatible = "brcm,bcm6345-gpio";
139 reg-names = "dirout", "dat";
140 gpio-controller;
141 #gpio-cells = <2>;
147 compatible = "brcm,bcm6345-gpio";
149 reg-names = "dirout", "dat";
150 gpio-controller;
151 #gpio-cells = <2>;
157 compatible = "brcm,bcm6345-gpio";
159 reg-names = "dirout", "dat";
160 gpio-controller;
161 #gpio-cells = <2>;
167 compatible = "brcm,bcm6345-gpio";
169 reg-names = "dirout", "dat";
170 gpio-controller;
171 #gpio-cells = <2>;
177 compatible = "brcm,bcm6345-gpio";
179 reg-names = "dirout", "dat";
180 gpio-controller;
181 #gpio-cells = <2>;
187 compatible = "brcm,bcm6345-gpio";
189 reg-names = "dirout", "dat";
190 gpio-controller;
191 #gpio-cells = <2>;
197 compatible = "brcm,bcm6345-gpio";
199 reg-names = "dirout", "dat";
200 gpio-controller;
201 #gpio-cells = <2>;
206 compatible = "brcm,iproc-rng200";
212 #address-cells = <1>;
213 #size-cells = <0>;
214 compatible = "brcm,bcm63178-hsspi", "brcm,bcmbca-hsspi-v1.0";
218 clock-names = "hsspi", "pll";
219 num-cs = <8>;
223 nand_controller: nand-controller@1800 {
224 #address-cells = <1>;
225 #size-cells = <0>;
226 compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
228 reg-names = "nand", "nand-int-base";
231 nandcs: nand@0 {
237 leds: led-controller@3000 {
238 #address-cells = <1>;
239 #size-cells = <0>;
240 compatible = "brcm,bcm63138-leds";
245 pl081_dma: dma-controller@11000 {
248 arm,primecell-periphid = <0x00041081>;
251 memcpy-burst-size = <256>;
252 memcpy-bus-width = <32>;
254 clock-names = "apb_pclk";
255 #dma-cells = <2>;
263 clock-names = "uartclk", "apb_pclk";