Lines Matching +full:0 +full:x400
126 #size-cells = <0>;
129 cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
131 cfam@0,0 {
132 reg = <0 0>;
135 chip-id = <0>;
139 reg = <0x1000 0x400>;
144 reg = <0x1800 0x400>;
146 #size-cells = <0>;
148 cfam0_i2c0: i2c-bus@0 {
149 reg = <0>; /* OMI01 */
151 #size-cells = <0>;
155 reg = <0x20>;
157 #size-cells = <0>;
159 cfam@0,0 {
160 reg = <0 0>;
163 chip-id = <0>;
167 reg = <0x1000 0x400>;
172 reg = <0x2400 0x400>;
181 #size-cells = <0>;
185 reg = <0x20>;
187 #size-cells = <0>;
189 cfam@0,0 {
190 reg = <0 0>;
193 chip-id = <0>;
197 reg = <0x1000 0x400>;
202 reg = <0x2400 0x400>;
211 #size-cells = <0>;
215 reg = <0x20>;
217 #size-cells = <0>;
219 cfam@0,0 {
220 reg = <0 0>;
223 chip-id = <0>;
227 reg = <0x1000 0x400>;
232 reg = <0x2400 0x400>;
241 #size-cells = <0>;
245 reg = <0x20>;
247 #size-cells = <0>;
249 cfam@0,0 {
250 reg = <0 0>;
253 chip-id = <0>;
257 reg = <0x1000 0x400>;
262 reg = <0x2400 0x400>;
271 #size-cells = <0>;
275 reg = <0x20>;
277 #size-cells = <0>;
279 cfam@0,0 {
280 reg = <0 0>;
283 chip-id = <0>;
287 reg = <0x1000 0x400>;
292 reg = <0x2400 0x400>;
301 #size-cells = <0>;
305 reg = <0x20>;
307 #size-cells = <0>;
309 cfam@0,0 {
310 reg = <0 0>;
313 chip-id = <0>;
317 reg = <0x1000 0x400>;
322 reg = <0x2400 0x400>;
331 #size-cells = <0>;
335 reg = <0x20>;
337 #size-cells = <0>;
339 cfam@0,0 {
340 reg = <0 0>;
343 chip-id = <0>;
347 reg = <0x1000 0x400>;
352 reg = <0x2400 0x400>;
361 #size-cells = <0>;
365 reg = <0x20>;
367 #size-cells = <0>;
369 cfam@0,0 {
370 reg = <0 0>;
373 chip-id = <0>;
377 reg = <0x1000 0x400>;
382 reg = <0x2400 0x400>;
391 reg = <0x1c00 0x400>;
393 #size-cells = <0>;
395 cfam0_spi0: spi@0 {
397 reg = <0x0>;
399 #size-cells = <0>;
401 eeprom@0 {
403 reg = <0>;
406 size = <0x80000>;
413 reg = <0x20>;
415 #size-cells = <0>;
417 eeprom@0 {
419 reg = <0>;
422 size = <0x80000>;
429 reg = <0x40>;
431 #size-cells = <0>;
433 eeprom@0 {
435 reg = <0>;
438 size = <0x80000>;
445 reg = <0x60>;
447 #size-cells = <0>;
449 eeprom@0 {
451 reg = <0>;
454 size = <0x80000>;
462 reg = <0x2400 0x400>;
476 reg = <0x3400 0x400>;
478 #size-cells = <0>;
484 cfam@1,0 {
485 reg = <1 0>;
492 reg = <0x1000 0x400>;
497 reg = <0x1800 0x400>;
499 #size-cells = <0>;
504 #size-cells = <0>;
508 reg = <0x20>;
510 #size-cells = <0>;
512 cfam@0,0 {
513 reg = <0 0>;
516 chip-id = <0>;
520 reg = <0x1000 0x400>;
525 reg = <0x2400 0x400>;
534 #size-cells = <0>;
538 reg = <0x20>;
540 #size-cells = <0>;
542 cfam@0,0 {
543 reg = <0 0>;
546 chip-id = <0>;
550 reg = <0x1000 0x400>;
555 reg = <0x2400 0x400>;
564 #size-cells = <0>;
568 reg = <0x20>;
570 #size-cells = <0>;
572 cfam@0,0 {
573 reg = <0 0>;
576 chip-id = <0>;
580 reg = <0x1000 0x400>;
585 reg = <0x2400 0x400>;
594 #size-cells = <0>;
598 reg = <0x20>;
600 #size-cells = <0>;
602 cfam@0,0 {
603 reg = <0 0>;
606 chip-id = <0>;
610 reg = <0x1000 0x400>;
615 reg = <0x2400 0x400>;
624 #size-cells = <0>;
628 reg = <0x20>;
630 #size-cells = <0>;
632 cfam@0,0 {
633 reg = <0 0>;
636 chip-id = <0>;
640 reg = <0x1000 0x400>;
645 reg = <0x2400 0x400>;
654 #size-cells = <0>;
658 reg = <0x20>;
660 #size-cells = <0>;
662 cfam@0,0 {
663 reg = <0 0>;
666 chip-id = <0>;
670 reg = <0x1000 0x400>;
675 reg = <0x2400 0x400>;
684 #size-cells = <0>;
688 reg = <0x20>;
690 #size-cells = <0>;
692 cfam@0,0 {
693 reg = <0 0>;
696 chip-id = <0>;
700 reg = <0x1000 0x400>;
705 reg = <0x2400 0x400>;
714 #size-cells = <0>;
718 reg = <0x20>;
720 #size-cells = <0>;
722 cfam@0,0 {
723 reg = <0 0>;
726 chip-id = <0>;
730 reg = <0x1000 0x400>;
735 reg = <0x2400 0x400>;
744 reg = <0x1c00 0x400>;
746 #size-cells = <0>;
748 cfam1_spi0: spi@0 {
750 reg = <0x0>;
752 #size-cells = <0>;
754 eeprom@0 {
756 reg = <0>;
759 size = <0x80000>;
766 reg = <0x20>;
768 #size-cells = <0>;
770 eeprom@0 {
772 reg = <0>;
775 size = <0x80000>;
782 reg = <0x40>;
784 #size-cells = <0>;
786 eeprom@0 {
788 reg = <0>;
791 size = <0x80000>;
798 reg = <0x60>;
800 #size-cells = <0>;
802 eeprom@0 {
804 reg = <0>;
807 size = <0x80000>;
815 reg = <0x2400 0x400>;
829 reg = <0x3400 0x400>;
831 #size-cells = <0>;
836 cfam@2,0 {
837 reg = <2 0>;
844 reg = <0x1000 0x400>;
849 reg = <0x1800 0x400>;
851 #size-cells = <0>;
853 cfam2_i2c0: i2c-bus@0 {
854 reg = <0>; /* OM01 */
856 #size-cells = <0>;
860 reg = <0x20>;
862 #size-cells = <0>;
864 cfam@0,0 {
865 reg = <0 0>;
868 chip-id = <0>;
872 reg = <0x1000 0x400>;
877 reg = <0x2400 0x400>;
886 #size-cells = <0>;
890 reg = <0x20>;
892 #size-cells = <0>;
894 cfam@0,0 {
895 reg = <0 0>;
898 chip-id = <0>;
902 reg = <0x1000 0x400>;
907 reg = <0x2400 0x400>;
916 #size-cells = <0>;
920 reg = <0x20>;
922 #size-cells = <0>;
924 cfam@0,0 {
925 reg = <0 0>;
928 chip-id = <0>;
932 reg = <0x1000 0x400>;
937 reg = <0x2400 0x400>;
946 #size-cells = <0>;
950 reg = <0x20>;
952 #size-cells = <0>;
954 cfam@0,0 {
955 reg = <0 0>;
958 chip-id = <0>;
962 reg = <0x1000 0x400>;
967 reg = <0x2400 0x400>;
976 #size-cells = <0>;
980 reg = <0x20>;
982 #size-cells = <0>;
984 cfam@0,0 {
985 reg = <0 0>;
988 chip-id = <0>;
992 reg = <0x1000 0x400>;
997 reg = <0x2400 0x400>;
1006 #size-cells = <0>;
1010 reg = <0x20>;
1012 #size-cells = <0>;
1014 cfam@0,0 {
1015 reg = <0 0>;
1018 chip-id = <0>;
1022 reg = <0x1000 0x400>;
1027 reg = <0x2400 0x400>;
1036 #size-cells = <0>;
1040 reg = <0x20>;
1042 #size-cells = <0>;
1044 cfam@0,0 {
1045 reg = <0 0>;
1048 chip-id = <0>;
1052 reg = <0x1000 0x400>;
1057 reg = <0x2400 0x400>;
1066 #size-cells = <0>;
1070 reg = <0x20>;
1072 #size-cells = <0>;
1074 cfam@0,0 {
1075 reg = <0 0>;
1078 chip-id = <0>;
1082 reg = <0x1000 0x400>;
1087 reg = <0x2400 0x400>;
1096 reg = <0x1c00 0x400>;
1098 #size-cells = <0>;
1100 cfam2_spi0: spi@0 {
1102 reg = <0x0>;
1104 #size-cells = <0>;
1106 eeprom@0 {
1108 reg = <0>;
1111 size = <0x80000>;
1118 reg = <0x20>;
1120 #size-cells = <0>;
1122 eeprom@0 {
1124 reg = <0>;
1127 size = <0x80000>;
1134 reg = <0x40>;
1136 #size-cells = <0>;
1138 eeprom@0 {
1140 reg = <0>;
1143 size = <0x80000>;
1150 reg = <0x60>;
1152 #size-cells = <0>;
1154 eeprom@0 {
1156 reg = <0>;
1159 size = <0x80000>;
1167 reg = <0x2400 0x400>;
1181 reg = <0x3400 0x400>;
1183 #size-cells = <0>;
1188 cfam@3,0 {
1189 reg = <3 0>;
1196 reg = <0x1000 0x400>;
1201 reg = <0x1800 0x400>;
1203 #size-cells = <0>;
1208 #size-cells = <0>;
1212 reg = <0x20>;
1214 #size-cells = <0>;
1216 cfam@0,0 {
1217 reg = <0 0>;
1220 chip-id = <0>;
1224 reg = <0x1000 0x400>;
1229 reg = <0x2400 0x400>;
1238 #size-cells = <0>;
1242 reg = <0x20>;
1244 #size-cells = <0>;
1246 cfam@0,0 {
1247 reg = <0 0>;
1250 chip-id = <0>;
1254 reg = <0x1000 0x400>;
1259 reg = <0x2400 0x400>;
1268 #size-cells = <0>;
1272 reg = <0x20>;
1274 #size-cells = <0>;
1276 cfam@0,0 {
1277 reg = <0 0>;
1280 chip-id = <0>;
1284 reg = <0x1000 0x400>;
1289 reg = <0x2400 0x400>;
1298 #size-cells = <0>;
1302 reg = <0x20>;
1304 #size-cells = <0>;
1306 cfam@0,0 {
1307 reg = <0 0>;
1310 chip-id = <0>;
1314 reg = <0x1000 0x400>;
1319 reg = <0x2400 0x400>;
1328 #size-cells = <0>;
1332 reg = <0x20>;
1334 #size-cells = <0>;
1336 cfam@0,0 {
1337 reg = <0 0>;
1340 chip-id = <0>;
1344 reg = <0x1000 0x400>;
1349 reg = <0x2400 0x400>;
1358 #size-cells = <0>;
1362 reg = <0x20>;
1364 #size-cells = <0>;
1366 cfam@0,0 {
1367 reg = <0 0>;
1370 chip-id = <0>;
1374 reg = <0x1000 0x400>;
1379 reg = <0x2400 0x400>;
1388 #size-cells = <0>;
1392 reg = <0x20>;
1394 #size-cells = <0>;
1396 cfam@0,0 {
1397 reg = <0 0>;
1400 chip-id = <0>;
1404 reg = <0x1000 0x400>;
1409 reg = <0x2400 0x400>;
1418 #size-cells = <0>;
1422 reg = <0x20>;
1424 #size-cells = <0>;
1426 cfam@0,0 {
1427 reg = <0 0>;
1430 chip-id = <0>;
1434 reg = <0x1000 0x400>;
1439 reg = <0x2400 0x400>;
1448 reg = <0x1c00 0x400>;
1450 #size-cells = <0>;
1452 cfam3_spi0: spi@0 {
1454 reg = <0x0>;
1456 #size-cells = <0>;
1458 eeprom@0 {
1460 reg = <0>;
1463 size = <0x80000>;
1470 reg = <0x20>;
1472 #size-cells = <0>;
1474 eeprom@0 {
1476 reg = <0>;
1479 size = <0x80000>;
1486 reg = <0x40>;
1488 #size-cells = <0>;
1490 eeprom@0 {
1492 reg = <0>;
1495 size = <0x80000>;
1502 reg = <0x60>;
1504 #size-cells = <0>;
1506 eeprom@0 {
1508 reg = <0>;
1511 size = <0x80000>;
1519 reg = <0x2400 0x400>;
1533 reg = <0x3400 0x400>;
1535 #size-cells = <0>;