Lines Matching +full:0 +full:x1e740000
48 #size-cells = <0>;
54 reg = <0xf00>;
60 reg = <0xf01>;
78 reg = <0x1e6e0000 0x174>;
79 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
95 reg = <0x40461000 0x1000>,
96 <0x40462000 0x1000>,
97 <0x40464000 0x2000>,
98 <0x40466000 0x2000>;
103 reg = <0x1e600000 0x100>;
107 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;
109 #size-cells = <0>;
114 flash@0 {
115 reg = < 0 >;
138 reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>;
140 #size-cells = <0>;
144 flash@0 {
145 reg = < 0 >;
161 reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>;
163 #size-cells = <0>;
167 flash@0 {
168 reg = < 0 >;
192 reg = <0x1e650000 0x8>;
194 #size-cells = <0>;
197 pinctrl-0 = <&pinctrl_mdio1_default>;
203 reg = <0x1e650008 0x8>;
205 #size-cells = <0>;
208 pinctrl-0 = <&pinctrl_mdio2_default>;
214 reg = <0x1e650010 0x8>;
216 #size-cells = <0>;
219 pinctrl-0 = <&pinctrl_mdio3_default>;
225 reg = <0x1e650018 0x8>;
227 #size-cells = <0>;
230 pinctrl-0 = <&pinctrl_mdio4_default>;
236 reg = <0x1e660000 0x180>;
244 reg = <0x1e680000 0x180>;
252 reg = <0x1e670000 0x180>;
260 reg = <0x1e690000 0x180>;
268 reg = <0x1e6a1000 0x100>;
272 pinctrl-0 = <&pinctrl_usb2ah_default>;
278 reg = <0x1e6a3000 0x100>;
282 pinctrl-0 = <&pinctrl_usb2bh_default>;
288 reg = <0x1e6b0000 0x100>;
301 reg = <0x1e6a0000 0x350>;
307 pinctrl-0 = <&pinctrl_usb2ad_default>;
313 reg = <0x1e6a2000 0x300>;
317 pinctrl-0 = <&pinctrl_usb2bd_default>;
329 reg = <0x1e6d0000 0x200>;
337 reg = <0x1e6e2000 0x1000>;
338 ranges = <0 0x1e6e2000 0x1000>;
350 reg = <0x14 0x4 0x5b0 0x8>;
355 reg = <0x180 0x40>;
361 reg = <0x560 0x4>;
369 reg = <0x570 0x4>;
377 reg = <0x1e6e2524 0x4>;
384 reg = <0x1e6e6000 0x1000>;
395 reg = <0x1e6e9000 0x100>;
405 reg = <0x1e6e9100 0x100>;
415 reg = <0x1e6f2000 0x1000>;
420 reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>;
428 reg = <0x1e700000 0x1000>;
440 reg = <0x1e780000 0x400>;
442 gpio-ranges = <&pinctrl 0 0 208>;
453 reg = <0x1e780500 0x100>;
460 pinctrl-0 = <&pinctrl_sgpm1_default>;
468 reg = <0x1e780600 0x100>;
475 pinctrl-0 = <&pinctrl_sgpm2_default>;
483 reg = <0x1e780800 0x800>;
485 gpio-ranges = <&pinctrl 0 208 36>;
494 reg = <0x1e781000 0x18>;
501 reg = <0x1e782000 0x90>;
517 reg = <0x1e783000 0x20>;
525 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>;
531 reg = <0x1e784000 0x1000>;
540 reg = <0x1e785000 0x40>;
545 reg = <0x1e785040 0x40>;
551 reg = <0x1e785080 0x40>;
557 reg = <0x1e7850C0 0x40>;
563 reg = <0x1e78b000 0x100>;
574 reg = <0x1e789000 0x1000>;
579 ranges = <0x0 0x1e789000 0x1000>;
583 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
592 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
600 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
608 reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>;
616 reg = <0x80 0x80>;
623 reg = <0x80 0x80>;
631 reg = <0xa0 0x24 0xc8 0x8>;
636 reg = <0x98 0x4>;
642 reg = <0x98 0x8>;
648 reg = <0x140 0x18>;
657 reg = <0x1e740000 0x100>;
660 ranges = <0 0x1e740000 0x10000>;
666 reg = <0x100 0x100>;
675 reg = <0x200 0x100>;
685 reg = <0x1e750000 0x100>;
688 ranges = <0 0x1e750000 0x10000>;
694 reg = <0x100 0x100>;
699 pinctrl-0 = <&pinctrl_emmc_default>;
705 reg = <0x1e787000 0x40>;
715 reg = <0x1e787800 0x40>;
725 reg = <0x1e788000 0x40>;
735 reg = <0x1e788800 0x40>;
745 reg = <0x1e78d000 0x20>;
753 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
759 reg = <0x1e78e000 0x20>;
767 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
773 reg = <0x1e78f000 0x20>;
781 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>;
787 reg = <0x1e790000 0x20>;
794 pinctrl-0 = <&pinctrl_uart6_default>;
801 reg = <0x1e790100 0x20>;
808 pinctrl-0 = <&pinctrl_uart7_default>;
815 reg = <0x1e790200 0x20>;
822 pinctrl-0 = <&pinctrl_uart8_default>;
829 reg = <0x1e790300 0x20>;
836 pinctrl-0 = <&pinctrl_uart9_default>;
845 ranges = <0 0x1e78a000 0x1000>;
851 reg = <0x1e79b000 0x94>;
854 pinctrl-0 = <&pinctrl_fsi1_default>;
863 reg = <0x1e79b100 0x94>;
866 pinctrl-0 = <&pinctrl_fsi2_default>;
874 reg = <0x1e79e000 0x1000>;
889 #size-cells = <0>;
890 reg = <0x80 0x80>;
897 pinctrl-0 = <&pinctrl_i2c1_default>;
903 #size-cells = <0>;
904 reg = <0x100 0x80>;
911 pinctrl-0 = <&pinctrl_i2c2_default>;
917 #size-cells = <0>;
918 reg = <0x180 0x80>;
925 pinctrl-0 = <&pinctrl_i2c3_default>;
931 #size-cells = <0>;
932 reg = <0x200 0x80>;
939 pinctrl-0 = <&pinctrl_i2c4_default>;
945 #size-cells = <0>;
946 reg = <0x280 0x80>;
953 pinctrl-0 = <&pinctrl_i2c5_default>;
959 #size-cells = <0>;
960 reg = <0x300 0x80>;
967 pinctrl-0 = <&pinctrl_i2c6_default>;
973 #size-cells = <0>;
974 reg = <0x380 0x80>;
981 pinctrl-0 = <&pinctrl_i2c7_default>;
987 #size-cells = <0>;
988 reg = <0x400 0x80>;
995 pinctrl-0 = <&pinctrl_i2c8_default>;
1001 #size-cells = <0>;
1002 reg = <0x480 0x80>;
1009 pinctrl-0 = <&pinctrl_i2c9_default>;
1015 #size-cells = <0>;
1016 reg = <0x500 0x80>;
1023 pinctrl-0 = <&pinctrl_i2c10_default>;
1029 #size-cells = <0>;
1030 reg = <0x580 0x80>;
1037 pinctrl-0 = <&pinctrl_i2c11_default>;
1043 #size-cells = <0>;
1044 reg = <0x600 0x80>;
1051 pinctrl-0 = <&pinctrl_i2c12_default>;
1057 #size-cells = <0>;
1058 reg = <0x680 0x80>;
1065 pinctrl-0 = <&pinctrl_i2c13_default>;
1071 #size-cells = <0>;
1072 reg = <0x700 0x80>;
1079 pinctrl-0 = <&pinctrl_i2c14_default>;
1085 #size-cells = <0>;
1086 reg = <0x780 0x80>;
1093 pinctrl-0 = <&pinctrl_i2c15_default>;
1099 #size-cells = <0>;
1100 reg = <0x800 0x80>;
1107 pinctrl-0 = <&pinctrl_i2c16_default>;