Lines Matching +full:0 +full:xca2
19 reg = <0x80000000 0x20000000>;
29 reg = <0x987f0000 0x00010000>; /* 64KB */
34 reg = <0x9f000000 0x01000000>; /* 16M */
38 size = <0x01000000>; /* 16M */
39 alignment = <0x01000000>;
59 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
73 flash@0 {
84 pinctrl-0 = <&pinctrl_spi1_default>;
86 flash@0 {
97 pinctrl-0 = <&pinctrl_txd1_default
105 pinctrl-0 = <&pinctrl_txd2_default
145 aspeed,lpc-io-reg = <0xffff>;
160 snoop-ports = <0x80>;
174 pinctrl-0 = <&pinctrl_pwm0_default
180 fan@0 {
181 reg = <0x00>;
182 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
187 reg = <0x03>;
188 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
192 reg = <0x03>;
193 aspeed,fan-tach-ch = /bits/ 8 <0x03>;
197 reg = <0x03>;
198 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
202 reg = <0x03>;
203 aspeed,fan-tach-ch = /bits/ 8 <0x05>;
208 reg = <0x04>;
209 aspeed,fan-tach-ch = /bits/ 8 <0x06>;
213 reg = <0x04>;
214 aspeed,fan-tach-ch = /bits/ 8 <0x07>;
234 reg = <0x50>;
247 /* PSU1 FRU @ 0xA0 */
250 reg = <0x50>;
253 /* PSU2 FRU @ 0xA2 */
256 reg = <0x51>;
259 /* PSU1 @ 0xB0 */
262 reg = <0x58>;
265 /* PSU2 @ 0xB2 */
268 reg = <0x59>;
282 reg = <0x28>;
284 #size-cells = <0>;
286 channel@0 { /* LTD */
287 reg = <0>;
322 * - PCA9548 @0xE0
323 * - PCA9548 @0xE2
324 * - PCA9544 @0xE4
346 pinctrl-0 = <&pinctrl_rmii1_default>;
352 pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
361 aspeed,lpc-io-reg = <0xca8>;
366 aspeed,lpc-io-reg = <0xca2>;