Lines Matching +full:0 +full:x400
175 reg = <0x80000000 0x40000000>;
184 reg = <0xb3d00000 0x100000>;
190 reg = <0xb3e00000 0x200000>; /* 16 * (4 * 0x8000) */
191 record-size = <0x8000>;
192 console-size = <0x8000>;
193 ftrace-size = <0x8000>;
194 pmsg-size = <0x8000>;
200 reg = <0xb4000000 0x04000000>; /* 64M */
207 reg = <0xbf000000 0x01000000>; /* 16M */
246 gpios = <&gpio0 ASPEED_GPIO(H, 0) GPIO_ACTIVE_LOW>;
280 pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
330 reg = <0x51>;
335 reg = <0x62>;
337 #size-cells = <0>;
373 reg = <0x54>;
378 reg = <0x68>;
383 reg = <0x69>;
388 reg = <0x6b>;
393 reg = <0x6d>;
402 reg = <0x65>;
404 #size-cells = <0>;
423 reg = <0x70>;
425 #size-cells = <0>;
428 i2c4mux0chn0: i2c@0 {
429 reg = <0>;
431 #size-cells = <0>;
435 reg = <0x52>;
440 reg = <0x62>;
442 #size-cells = <0>;
446 led@0 {
447 reg = <0>;
467 #size-cells = <0>;
471 reg = <0x50>;
476 reg = <0x60>;
478 #size-cells = <0>;
482 led@0 {
483 reg = <0>;
503 #size-cells = <0>;
507 reg = <0x51>;
512 reg = <0x61>;
514 #size-cells = <0>;
518 led@0 {
519 reg = <0>;
543 reg = <0x66>;
545 #size-cells = <0>;
566 reg = <0x70>;
568 #size-cells = <0>;
571 i2c5mux0chn0: i2c@0 {
572 reg = <0>;
574 #size-cells = <0>;
578 reg = <0x50>;
583 reg = <0x60>;
585 #size-cells = <0>;
589 led@0 {
590 reg = <0>;
610 #size-cells = <0>;
614 reg = <0x51>;
619 reg = <0x61>;
621 #size-cells = <0>;
625 led@0 {
626 reg = <0>;
646 #size-cells = <0>;
650 reg = <0x52>;
655 reg = <0x62>;
657 #size-cells = <0>;
661 led@0 {
662 reg = <0>;
682 #size-cells = <0>;
686 reg = <0x53>;
691 reg = <0x63>;
693 #size-cells = <0>;
697 led@0 {
698 reg = <0>;
722 reg = <0x70>;
724 #size-cells = <0>;
727 i2c6mux0chn0: i2c@0 {
728 reg = <0>;
730 #size-cells = <0>;
734 reg = <0x50>;
739 reg = <0x60>;
741 #size-cells = <0>;
745 led@0 {
746 reg = <0>;
766 #size-cells = <0>;
770 reg = <0x52>;
775 reg = <0x62>;
777 #size-cells = <0>;
781 led@0 {
782 reg = <0>;
802 #size-cells = <0>;
806 reg = <0x53>;
811 reg = <0x63>;
813 #size-cells = <0>;
817 led@0 {
818 reg = <0>;
838 #size-cells = <0>;
842 reg = <0x51>;
847 reg = <0x61>;
849 #size-cells = <0>;
853 led@0 {
854 reg = <0>;
874 reg = <0x65>;
876 #size-cells = <0>;
975 reg = <0x31>;
977 #size-cells = <0>;
981 led@0 {
982 reg = <0>;
1112 reg = <0x32>;
1114 #size-cells = <0>;
1118 led@0 {
1119 reg = <0>;
1249 reg = <0x33>;
1251 #size-cells = <0>;
1255 led@0 {
1256 reg = <0>;
1386 reg = <0x30>;
1388 #size-cells = <0>;
1392 led@0 {
1393 reg = <0>;
1523 reg = <0x34>;
1525 #size-cells = <0>;
1529 led@0 {
1530 reg = <0>;
1652 reg = <0x35>;
1654 #size-cells = <0>;
1658 led@0 {
1659 reg = <0>;
1785 reg = <0x11>;
1790 reg = <0x32>;
1795 reg = <0x51>;
1800 reg = <0x50>;
1805 reg = <0x70>;
1807 #size-cells = <0>;
1811 i2c8mux0chn0: i2c@0 {
1812 reg = <0>;
1814 #size-cells = <0>;
1820 #size-cells = <0>;
1830 reg = <0x50>;
1835 reg = <0x51>;
1840 reg = <0x53>;
1845 reg = <0x52>;
1854 reg = <0x51>;
1859 reg = <0x50>;
1864 reg = <0x53>;
1869 reg = <0x52>;
1878 reg = <0x51>;
1883 reg = <0x50>;
1888 reg = <0x53>;
1893 reg = <0x52>;
1902 reg = <0x2e>;
1912 reg = <0x51>;
1917 reg = <0x50>;
1922 reg = <0x53>;
1927 reg = <0x52>;
1937 reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>;
1942 reg = <0x70>;
1944 #size-cells = <0>;
1947 i2c14mux0chn0: i2c@0 {
1948 reg = <0>;
1950 #size-cells = <0>;
1954 reg = <0x50>;
1961 #size-cells = <0>;
1965 reg = <0x51>;
1972 #size-cells = <0>;
1976 reg = <0x50>;
1981 reg = <0x60>;
1983 #size-cells = <0>;
1987 led@0 {
1988 reg = <0>;
2024 #size-cells = <0>;
2028 reg = <0x52>;
2030 #size-cells = <0>;
2035 reg = <0x60>;
2037 #size-cells = <0>;
2041 led@0 {
2042 reg = <0>;
2157 #size-cells = <0>;
2158 reg = <0x61>;
2176 reg = <0x71>;
2178 #size-cells = <0>;
2181 i2c14mux1chn0: i2c@0 {
2182 reg = <0>;
2184 #size-cells = <0>;
2188 reg = <0x50>;
2195 #size-cells = <0>;
2199 reg = <0x50>;
2206 #size-cells = <0>;
2210 reg = <0x50>;
2217 #size-cells = <0>;
2221 reg = <0x50>;
2232 reg = <0x70>;
2234 #size-cells = <0>;
2237 i2c15mux0chn0: i2c@0 {
2238 reg = <0>;
2240 #size-cells = <0>;
2244 reg = <0x53>;
2251 #size-cells = <0>;
2255 reg = <0x53>;
2262 #size-cells = <0>;
2266 reg = <0x53>;
2273 #size-cells = <0>;
2277 reg = <0x53>;
2284 reg = <0x71>;
2286 #size-cells = <0>;
2289 i2c15mux1chn0: i2c@0 {
2290 reg = <0>;
2292 #size-cells = <0>;
2296 reg = <0x53>;
2303 #size-cells = <0>;
2307 reg = <0x53>;
2314 #size-cells = <0>;
2318 reg = <0x53>;
2325 #size-cells = <0>;
2329 reg = <0x53>;
2336 reg = <0x72>;
2338 #size-cells = <0>;
2341 i2c15mux2chn0: i2c@0 {
2342 reg = <0>;
2344 #size-cells = <0>;
2348 reg = <0x53>;
2355 #size-cells = <0>;
2359 reg = <0x53>;
2366 #size-cells = <0>;
2372 #size-cells = <0>;
2426 pinctrl-0 = <&pinctrl_rmii3_default>;
2436 pinctrl-0 = <&pinctrl_rmii4_default>;
2450 pinctrl-0 = <&pinctrl_wdtrst1_default>;
2459 aspeed,lpc-io-reg = <0xca8 0xcac>;
2464 aspeed,lpc-io-reg = <0xca2>;
2469 cfam@4,0 { /* DCM2_C0 */
2470 reg = <4 0>;
2477 reg = <0x1000 0x400>;
2482 reg = <0x1800 0x400>;
2484 #size-cells = <0>;
2486 cfam4_i2c0: i2c-bus@0 {
2487 reg = <0>; /* OM01 */
2489 #size-cells = <0>;
2493 reg = <0x20>;
2495 #size-cells = <0>;
2497 cfam@0,0 {
2498 reg = <0 0>;
2501 chip-id = <0>;
2505 reg = <0x1000 0x400>;
2510 reg = <0x2400 0x400>;
2519 #size-cells = <0>;
2523 reg = <0x20>;
2525 #size-cells = <0>;
2527 cfam@0,0 {
2528 reg = <0 0>;
2531 chip-id = <0>;
2535 reg = <0x1000 0x400>;
2540 reg = <0x2400 0x400>;
2549 #size-cells = <0>;
2553 reg = <0x20>;
2555 #size-cells = <0>;
2557 cfam@0,0 {
2558 reg = <0 0>;
2561 chip-id = <0>;
2565 reg = <0x1000 0x400>;
2570 reg = <0x2400 0x400>;
2579 #size-cells = <0>;
2583 reg = <0x20>;
2585 #size-cells = <0>;
2587 cfam@0,0 {
2588 reg = <0 0>;
2591 chip-id = <0>;
2595 reg = <0x1000 0x400>;
2600 reg = <0x2400 0x400>;
2609 #size-cells = <0>;
2613 reg = <0x20>;
2615 #size-cells = <0>;
2617 cfam@0,0 {
2618 reg = <0 0>;
2621 chip-id = <0>;
2625 reg = <0x1000 0x400>;
2630 reg = <0x2400 0x400>;
2639 #size-cells = <0>;
2643 reg = <0x20>;
2645 #size-cells = <0>;
2647 cfam@0,0 {
2648 reg = <0 0>;
2651 chip-id = <0>;
2655 reg = <0x1000 0x400>;
2660 reg = <0x2400 0x400>;
2669 #size-cells = <0>;
2673 reg = <0x20>;
2675 #size-cells = <0>;
2677 cfam@0,0 {
2678 reg = <0 0>;
2681 chip-id = <0>;
2685 reg = <0x1000 0x400>;
2690 reg = <0x2400 0x400>;
2699 #size-cells = <0>;
2703 reg = <0x20>;
2705 #size-cells = <0>;
2707 cfam@0,0 {
2708 reg = <0 0>;
2711 chip-id = <0>;
2715 reg = <0x1000 0x400>;
2720 reg = <0x2400 0x400>;
2729 reg = <0x1c00 0x400>;
2731 #size-cells = <0>;
2733 cfam4_spi0: spi@0 {
2735 reg = <0x0>;
2737 #size-cells = <0>;
2739 eeprom@0 {
2741 reg = <0>;
2744 size = <0x80000>;
2751 reg = <0x20>;
2753 #size-cells = <0>;
2755 eeprom@0 {
2757 reg = <0>;
2760 size = <0x80000>;
2767 reg = <0x40>;
2769 #size-cells = <0>;
2771 eeprom@0 {
2773 reg = <0>;
2776 size = <0x80000>;
2783 reg = <0x60>;
2785 #size-cells = <0>;
2787 eeprom@0 {
2789 reg = <0>;
2792 size = <0x80000>;
2800 reg = <0x2400 0x400>;
2814 reg = <0x3400 0x400>;
2816 #size-cells = <0>;
2821 cfam@5,0 { /* DCM2_C1 */
2822 reg = <5 0>;
2829 reg = <0x1000 0x400>;
2834 reg = <0x1800 0x400>;
2836 #size-cells = <0>;
2841 #size-cells = <0>;
2845 reg = <0x20>;
2847 #size-cells = <0>;
2849 cfam@0,0 {
2850 reg = <0 0>;
2853 chip-id = <0>;
2857 reg = <0x1000 0x400>;
2862 reg = <0x2400 0x400>;
2871 #size-cells = <0>;
2875 reg = <0x20>;
2877 #size-cells = <0>;
2879 cfam@0,0 {
2880 reg = <0 0>;
2883 chip-id = <0>;
2887 reg = <0x1000 0x400>;
2892 reg = <0x2400 0x400>;
2901 #size-cells = <0>;
2905 reg = <0x20>;
2907 #size-cells = <0>;
2909 cfam@0,0 {
2910 reg = <0 0>;
2913 chip-id = <0>;
2917 reg = <0x1000 0x400>;
2922 reg = <0x2400 0x400>;
2931 #size-cells = <0>;
2935 reg = <0x20>;
2937 #size-cells = <0>;
2939 cfam@0,0 {
2940 reg = <0 0>;
2943 chip-id = <0>;
2947 reg = <0x1000 0x400>;
2952 reg = <0x2400 0x400>;
2961 #size-cells = <0>;
2965 reg = <0x20>;
2967 #size-cells = <0>;
2969 cfam@0,0 {
2970 reg = <0 0>;
2973 chip-id = <0>;
2977 reg = <0x1000 0x400>;
2982 reg = <0x2400 0x400>;
2991 #size-cells = <0>;
2995 reg = <0x20>;
2997 #size-cells = <0>;
2999 cfam@0,0 {
3000 reg = <0 0>;
3003 chip-id = <0>;
3007 reg = <0x1000 0x400>;
3012 reg = <0x2400 0x400>;
3021 #size-cells = <0>;
3025 reg = <0x20>;
3027 #size-cells = <0>;
3029 cfam@0,0 {
3030 reg = <0 0>;
3033 chip-id = <0>;
3037 reg = <0x1000 0x400>;
3042 reg = <0x2400 0x400>;
3051 #size-cells = <0>;
3055 reg = <0x20>;
3057 #size-cells = <0>;
3059 cfam@0,0 {
3060 reg = <0 0>;
3063 chip-id = <0>;
3067 reg = <0x1000 0x400>;
3072 reg = <0x2400 0x400>;
3081 reg = <0x1c00 0x400>;
3083 #size-cells = <0>;
3085 cfam5_spi0: spi@0 {
3087 reg = <0x0>;
3089 #size-cells = <0>;
3091 eeprom@0 {
3093 reg = <0>;
3096 size = <0x80000>;
3103 reg = <0x20>;
3105 #size-cells = <0>;
3107 eeprom@0 {
3109 reg = <0>;
3112 size = <0x80000>;
3119 reg = <0x40>;
3121 #size-cells = <0>;
3123 eeprom@0 {
3125 reg = <0>;
3128 size = <0x80000>;
3135 reg = <0x60>;
3137 #size-cells = <0>;
3139 eeprom@0 {
3141 reg = <0>;
3144 size = <0x80000>;
3152 reg = <0x2400 0x400>;
3166 reg = <0x3400 0x400>;
3168 #size-cells = <0>;
3173 cfam@6,0 { /* DCM3_C0 */
3174 reg = <6 0>;
3181 reg = <0x1000 0x400>;
3186 reg = <0x1800 0x400>;
3188 #size-cells = <0>;
3190 cfam6_i2c0: i2c-bus@0 {
3191 reg = <0>; /* OM01 */
3193 #size-cells = <0>;
3197 reg = <0x20>;
3199 #size-cells = <0>;
3201 cfam@0,0 {
3202 reg = <0 0>;
3205 chip-id = <0>;
3209 reg = <0x1000 0x400>;
3214 reg = <0x2400 0x400>;
3223 #size-cells = <0>;
3227 reg = <0x20>;
3229 #size-cells = <0>;
3231 cfam@0,0 {
3232 reg = <0 0>;
3235 chip-id = <0>;
3239 reg = <0x1000 0x400>;
3244 reg = <0x2400 0x400>;
3253 #size-cells = <0>;
3257 reg = <0x20>;
3259 #size-cells = <0>;
3261 cfam@0,0 {
3262 reg = <0 0>;
3265 chip-id = <0>;
3269 reg = <0x1000 0x400>;
3274 reg = <0x2400 0x400>;
3283 #size-cells = <0>;
3287 reg = <0x20>;
3289 #size-cells = <0>;
3291 cfam@0,0 {
3292 reg = <0 0>;
3295 chip-id = <0>;
3299 reg = <0x1000 0x400>;
3304 reg = <0x2400 0x400>;
3313 #size-cells = <0>;
3317 reg = <0x20>;
3319 #size-cells = <0>;
3321 cfam@0,0 {
3322 reg = <0 0>;
3325 chip-id = <0>;
3329 reg = <0x1000 0x400>;
3334 reg = <0x2400 0x400>;
3343 #size-cells = <0>;
3347 reg = <0x20>;
3349 #size-cells = <0>;
3351 cfam@0,0 {
3352 reg = <0 0>;
3355 chip-id = <0>;
3359 reg = <0x1000 0x400>;
3364 reg = <0x2400 0x400>;
3373 #size-cells = <0>;
3377 reg = <0x20>;
3379 #size-cells = <0>;
3381 cfam@0,0 {
3382 reg = <0 0>;
3385 chip-id = <0>;
3389 reg = <0x1000 0x400>;
3394 reg = <0x2400 0x400>;
3403 #size-cells = <0>;
3407 reg = <0x20>;
3409 #size-cells = <0>;
3411 cfam@0,0 {
3412 reg = <0 0>;
3415 chip-id = <0>;
3419 reg = <0x1000 0x400>;
3424 reg = <0x2400 0x400>;
3433 reg = <0x1c00 0x400>;
3435 #size-cells = <0>;
3437 cfam6_spi0: spi@0 {
3439 reg = <0x0>;
3441 #size-cells = <0>;
3443 eeprom@0 {
3445 reg = <0>;
3448 size = <0x80000>;
3455 reg = <0x20>;
3457 #size-cells = <0>;
3459 eeprom@0 {
3461 reg = <0>;
3464 size = <0x80000>;
3471 reg = <0x40>;
3473 #size-cells = <0>;
3475 eeprom@0 {
3477 reg = <0>;
3480 size = <0x80000>;
3487 reg = <0x60>;
3489 #size-cells = <0>;
3491 eeprom@0 {
3493 reg = <0>;
3496 size = <0x80000>;
3504 reg = <0x2400 0x400>;
3518 reg = <0x3400 0x400>;
3520 #size-cells = <0>;
3525 cfam@7,0 { /* DCM3_C1 */
3526 reg = <7 0>;
3533 reg = <0x1000 0x400>;
3538 reg = <0x1800 0x400>;
3540 #size-cells = <0>;
3545 #size-cells = <0>;
3549 reg = <0x20>;
3551 #size-cells = <0>;
3553 cfam@0,0 {
3554 reg = <0 0>;
3557 chip-id = <0>;
3561 reg = <0x1000 0x400>;
3566 reg = <0x2400 0x400>;
3575 #size-cells = <0>;
3579 reg = <0x20>;
3581 #size-cells = <0>;
3583 cfam@0,0 {
3584 reg = <0 0>;
3587 chip-id = <0>;
3591 reg = <0x1000 0x400>;
3596 reg = <0x2400 0x400>;
3605 #size-cells = <0>;
3609 reg = <0x20>;
3611 #size-cells = <0>;
3613 cfam@0,0 {
3614 reg = <0 0>;
3617 chip-id = <0>;
3621 reg = <0x1000 0x400>;
3626 reg = <0x2400 0x400>;
3635 #size-cells = <0>;
3639 reg = <0x20>;
3641 #size-cells = <0>;
3643 cfam@0,0 {
3644 reg = <0 0>;
3647 chip-id = <0>;
3651 reg = <0x1000 0x400>;
3656 reg = <0x2400 0x400>;
3665 #size-cells = <0>;
3669 reg = <0x20>;
3671 #size-cells = <0>;
3673 cfam@0,0 {
3674 reg = <0 0>;
3677 chip-id = <0>;
3681 reg = <0x1000 0x400>;
3686 reg = <0x2400 0x400>;
3695 #size-cells = <0>;
3699 reg = <0x20>;
3701 #size-cells = <0>;
3703 cfam@0,0 {
3704 reg = <0 0>;
3707 chip-id = <0>;
3711 reg = <0x1000 0x400>;
3716 reg = <0x2400 0x400>;
3725 #size-cells = <0>;
3729 reg = <0x20>;
3731 #size-cells = <0>;
3733 cfam@0,0 {
3734 reg = <0 0>;
3737 chip-id = <0>;
3741 reg = <0x1000 0x400>;
3746 reg = <0x2400 0x400>;
3755 #size-cells = <0>;
3759 reg = <0x20>;
3761 #size-cells = <0>;
3763 cfam@0,0 {
3764 reg = <0 0>;
3767 chip-id = <0>;
3771 reg = <0x1000 0x400>;
3776 reg = <0x2400 0x400>;
3785 reg = <0x1c00 0x400>;
3787 #size-cells = <0>;
3789 cfam7_spi0: spi@0 {
3791 reg = <0x0>;
3793 #size-cells = <0>;
3795 eeprom@0 {
3797 reg = <0>;
3800 size = <0x80000>;
3807 reg = <0x20>;
3809 #size-cells = <0>;
3811 eeprom@0 {
3813 reg = <0>;
3816 size = <0x80000>;
3823 reg = <0x40>;
3825 #size-cells = <0>;
3827 eeprom@0 {
3829 reg = <0>;
3832 size = <0x80000>;
3839 reg = <0x60>;
3841 #size-cells = <0>;
3843 eeprom@0 {
3845 reg = <0>;
3848 size = <0x80000>;
3856 reg = <0x2400 0x400>;
3870 reg = <0x3400 0x400>;
3872 #size-cells = <0>;