Lines Matching +full:wp +full:- +full:inverted
1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
11 compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
26 reserved-memory {
27 #address-cells = <1>;
28 #size-cells = <1>;
34 compatible = "shared-dma-pool";
41 compatible = "shared-dma-pool";
46 vcc_sdhci0: regulator-vcc-sdhci0 {
47 compatible = "regulator-fixed";
48 regulator-name = "SDHCI0 Vcc";
49 regulator-min-microvolt = <3300000>;
50 regulator-max-microvolt = <3300000>;
52 enable-active-high;
55 vccq_sdhci0: regulator-vccq-sdhci0 {
56 compatible = "regulator-gpio";
57 regulator-name = "SDHCI0 VccQ";
58 regulator-min-microvolt = <1800000>;
59 regulator-max-microvolt = <3300000>;
61 gpios-states = <1>;
66 vcc_sdhci1: regulator-vcc-sdhci1 {
67 compatible = "regulator-fixed";
68 regulator-name = "SDHCI1 Vcc";
69 regulator-min-microvolt = <3300000>;
70 regulator-max-microvolt = <3300000>;
72 enable-active-high;
75 vccq_sdhci1: regulator-vccq-sdhci1 {
76 compatible = "regulator-gpio";
77 regulator-name = "SDHCI1 VccQ";
78 regulator-min-microvolt = <1800000>;
79 regulator-max-microvolt = <3300000>;
81 gpios-states = <1>;
90 ethphy0: ethernet-phy@0 {
91 compatible = "ethernet-phy-ieee802.3-c22";
99 ethphy1: ethernet-phy@0 {
100 compatible = "ethernet-phy-ieee802.3-c22";
108 ethphy2: ethernet-phy@0 {
109 compatible = "ethernet-phy-ieee802.3-c22";
117 ethphy3: ethernet-phy@0 {
118 compatible = "ethernet-phy-ieee802.3-c22";
126 phy-mode = "rgmii-rxid";
127 phy-handle = <ðphy0>;
129 pinctrl-names = "default";
130 pinctrl-0 = <&pinctrl_rgmii1_default>;
137 phy-mode = "rgmii-rxid";
138 phy-handle = <ðphy1>;
140 pinctrl-names = "default";
141 pinctrl-0 = <&pinctrl_rgmii2_default>;
147 phy-mode = "rgmii";
148 phy-handle = <ðphy2>;
150 pinctrl-names = "default";
151 pinctrl-0 = <&pinctrl_rgmii3_default>;
157 phy-mode = "rgmii";
158 phy-handle = <ðphy3>;
160 pinctrl-names = "default";
161 pinctrl-0 = <&pinctrl_rgmii4_default>;
169 non-removable;
170 bus-width = <4>;
171 max-frequency = <100000000>;
172 clk-phase-mmc-hs200 = <9>, <225>;
183 m25p,fast-read;
185 spi-rx-bus-width = <4>;
186 spi-max-frequency = <50000000>;
187 #include "openbmc-flash-layout-64.dtsi"
193 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_spi1_default>;
198 m25p,fast-read;
200 spi-rx-bus-width = <4>;
201 spi-max-frequency = <100000000>;
207 compatible = "snps,dw-apb-uart";
299 * The signal voltage of sdhci0 and sdhci1 on AST2600-A2 EVB is able to be
301 * In the reference design, GPIOV0 of AST2600-A2 EVB is connected to the
309 * AST2600-A2 EVB also supports toggling signal voltage for sdhci1.
310 * The design is the same as sdhci0, it uses GPIOV2 as power-gpio and GPIOV3
311 * as power-switch-gpio.
315 bus-width = <4>;
316 max-frequency = <100000000>;
317 sdhci-drive-type = /bits/ 8 <3>;
318 sdhci-caps-mask = <0x7 0x0>;
319 sdhci,wp-inverted;
320 vmmc-supply = <&vcc_sdhci0>;
321 vqmmc-supply = <&vccq_sdhci0>;
322 clk-phase-sd-hs = <7>, <200>;
327 bus-width = <4>;
328 max-frequency = <100000000>;
329 sdhci-drive-type = /bits/ 8 <3>;
330 sdhci-caps-mask = <0x7 0x0>;
331 sdhci,wp-inverted;
332 vmmc-supply = <&vcc_sdhci1>;
333 vqmmc-supply = <&vccq_sdhci1>;
334 clk-phase-sd-hs = <7>, <200>;
339 pinctrl-names = "default";
344 memory-region = <&video_engine_memory>;
349 memory-region = <&gfx_memory>;