Lines Matching +full:integratorap +full:- +full:pci
1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 compatible = "arm,integrator-ap";
16 #address-cells = <1>;
17 #size-cells = <0>;
27 /* compatible = "arm,arm926ej-s"; */
30 * The documentation in ARM DUI 0138E page 3-12 states
32 * but painful trial-and-error has proved to me that it
37 operating-points = <71000 0
45 clock-names = "cpu";
46 clock-latency = <1000000>; /* 1 ms */
51 arm,timer-primary = &timer2;
52 arm,timer-secondary = &timer1;
60 xtal24mhz: pclk: clock-24000000 {
61 #clock-cells = <0>;
62 compatible = "fixed-clock";
63 clock-frequency = <24000000>;
67 uartclk: clock-14745600 {
68 #clock-cells = <0>;
69 compatible = "fixed-clock";
70 clock-frequency = <14745600>;
74 core-module@10000000 {
76 cm24mhz: clock-24000000 {
77 #clock-cells = <0>;
78 compatible = "fixed-clock";
79 clock-frequency = <24000000>;
83 cmosc: clock-controller@8 {
84 compatible = "arm,syscon-icst525-integratorap-cm";
86 #clock-cells = <0>;
87 lock-offset = <0x14>;
88 vco-offset = <0x08>;
93 auxosc: clock-controller@1c {
94 compatible = "arm,syscon-icst525";
96 #clock-cells = <0>;
97 lock-offset = <0x14>;
98 vco-offset = <0x1c>;
104 compatible = "arm,integrator-ap-syscon", "syscon";
107 #size-cells = <1>;
108 #address-cells = <1>;
114 sysclk: clock-controller@4 {
115 compatible = "arm,syscon-icst525-integratorap-sys";
117 #clock-cells = <0>;
118 lock-offset = <0x1c>;
119 vco-offset = <0x04>;
123 /* One-bit control for the PCI bus clock (33 or 25 MHz) */
124 pciclk: clock-controller@4,8 {
125 compatible = "arm,syscon-icst525-integratorap-pci";
127 #clock-cells = <0>;
128 lock-offset = <0x1c>;
129 vco-offset = <0x04>;
135 compatible = "arm,integrator-timer";
140 compatible = "arm,integrator-timer";
145 compatible = "arm,integrator-timer";
150 valid-mask = <0x003fffff>;
153 pci: pci@62000000 { label
154 compatible = "arm,integrator-ap-pci", "v3,v360epc-pci";
155 device_type = "pci";
156 #interrupt-cells = <1>;
157 #size-cells = <2>;
158 #address-cells = <3>;
161 interrupt-parent = <&pic>;
164 bus-range = <0x00 0xff>;
167 0x02000000 0 0x40000000 /* non-prefectable memory @40000000 */
171 dma-ranges = <0x02000000 0 0x20000000 /* EBI memory space */
175 interrupt-map-mask = <0xf800 0 0 0x7>;
176 interrupt-map = <
208 arm,primecell-periphid = <0x00041030>;
210 clock-names = "apb_pclk";
215 arm,primecell-periphid = <0x00041010>;
217 clock-names = "uartclk", "apb_pclk";
222 arm,primecell-periphid = <0x00041010>;
224 clock-names = "uartclk", "apb_pclk";
229 arm,primecell-periphid = <0x00041050>;
231 clock-names = "KMIREFCLK", "apb_pclk";
236 arm,primecell-periphid = <0x00041050>;
238 clock-names = "KMIREFCLK", "apb_pclk";
248 compatible = "arm,integrator-ap-lm";
249 #address-cells = <1>;
250 #size-cells = <1>;
252 dma-ranges;
255 compatible = "simple-bus";
257 dma-ranges = <0x00000000 0xc0000000 0x10000000>;
259 #address-cells = <1>;
260 #size-cells = <1>;
263 compatible = "simple-bus";
265 dma-ranges = <0x00000000 0xd0000000 0x10000000>;
267 #address-cells = <1>;
268 #size-cells = <1>;
271 compatible = "simple-bus";
273 dma-ranges = <0x00000000 0xe0000000 0x10000000>;
275 #address-cells = <1>;
276 #size-cells = <1>;
279 compatible = "simple-bus";
281 dma-ranges = <0x00000000 0xf0000000 0x10000000>;
283 #address-cells = <1>;
284 #size-cells = <1>;