Lines Matching +full:temperature +full:- +full:offset +full:- +full:millicelsius
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 #include <dt-bindings/clock/meson8-ddr-clkc.h>
8 #include <dt-bindings/clock/meson8b-clkc.h>
9 #include <dt-bindings/gpio/meson8b-gpio.h>
10 #include <dt-bindings/power/meson8-power.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
13 #include <dt-bindings/thermal/thermal.h>
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a5";
24 next-level-cache = <&L2>;
26 enable-method = "amlogic,meson8b-smp";
28 operating-points-v2 = <&cpu_opp_table>;
30 #cooling-cells = <2>; /* min followed by max */
35 compatible = "arm,cortex-a5";
36 next-level-cache = <&L2>;
38 enable-method = "amlogic,meson8b-smp";
40 operating-points-v2 = <&cpu_opp_table>;
42 #cooling-cells = <2>; /* min followed by max */
47 compatible = "arm,cortex-a5";
48 next-level-cache = <&L2>;
50 enable-method = "amlogic,meson8b-smp";
52 operating-points-v2 = <&cpu_opp_table>;
54 #cooling-cells = <2>; /* min followed by max */
59 compatible = "arm,cortex-a5";
60 next-level-cache = <&L2>;
62 enable-method = "amlogic,meson8b-smp";
64 operating-points-v2 = <&cpu_opp_table>;
66 #cooling-cells = <2>; /* min followed by max */
70 cpu_opp_table: opp-table {
71 compatible = "operating-points-v2";
72 opp-shared;
74 opp-96000000 {
75 opp-hz = /bits/ 64 <96000000>;
76 opp-microvolt = <860000>;
78 opp-192000000 {
79 opp-hz = /bits/ 64 <192000000>;
80 opp-microvolt = <860000>;
82 opp-312000000 {
83 opp-hz = /bits/ 64 <312000000>;
84 opp-microvolt = <860000>;
86 opp-408000000 {
87 opp-hz = /bits/ 64 <408000000>;
88 opp-microvolt = <860000>;
90 opp-504000000 {
91 opp-hz = /bits/ 64 <504000000>;
92 opp-microvolt = <860000>;
94 opp-600000000 {
95 opp-hz = /bits/ 64 <600000000>;
96 opp-microvolt = <860000>;
98 opp-720000000 {
99 opp-hz = /bits/ 64 <720000000>;
100 opp-microvolt = <860000>;
102 opp-816000000 {
103 opp-hz = /bits/ 64 <816000000>;
104 opp-microvolt = <900000>;
106 opp-1008000000 {
107 opp-hz = /bits/ 64 <1008000000>;
108 opp-microvolt = <1140000>;
110 opp-1200000000 {
111 opp-hz = /bits/ 64 <1200000000>;
112 opp-microvolt = <1140000>;
114 opp-1320000000 {
115 opp-hz = /bits/ 64 <1320000000>;
116 opp-microvolt = <1140000>;
118 opp-1488000000 {
119 opp-hz = /bits/ 64 <1488000000>;
120 opp-microvolt = <1140000>;
122 opp-1536000000 {
123 opp-hz = /bits/ 64 <1536000000>;
124 opp-microvolt = <1140000>;
128 gpu_opp_table: opp-table-gpu {
129 compatible = "operating-points-v2";
131 opp-255000000 {
132 opp-hz = /bits/ 64 <255000000>;
133 opp-microvolt = <1100000>;
135 opp-364285714 {
136 opp-hz = /bits/ 64 <364285714>;
137 opp-microvolt = <1100000>;
139 opp-425000000 {
140 opp-hz = /bits/ 64 <425000000>;
141 opp-microvolt = <1100000>;
143 opp-510000000 {
144 opp-hz = /bits/ 64 <510000000>;
145 opp-microvolt = <1100000>;
147 opp-637500000 {
148 opp-hz = /bits/ 64 <637500000>;
149 opp-microvolt = <1100000>;
150 turbo-mode;
155 compatible = "arm,cortex-a5-pmu";
160 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
163 reserved-memory {
164 #address-cells = <1>;
165 #size-cells = <1>;
171 no-map;
175 thermal-zones {
176 soc-thermal {
177 polling-delay-passive = <250>; /* milliseconds */
178 polling-delay = <1000>; /* milliseconds */
179 thermal-sensors = <&thermal_sensor>;
181 cooling-maps {
184 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
193 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
202 soc_passive: soc-passive {
203 temperature = <80000>; /* millicelsius */
204 hysteresis = <2000>; /* millicelsius */
208 soc_hot: soc-hot {
209 temperature = <90000>; /* millicelsius */
210 hysteresis = <2000>; /* millicelsius */
214 soc_critical: soc-critical {
215 temperature = <110000>; /* millicelsius */
216 hysteresis = <2000>; /* millicelsius */
224 compatible = "simple-bus";
226 #address-cells = <1>;
227 #size-cells = <1>;
230 ddr_clkc: clock-controller@400 {
231 compatible = "amlogic,meson8b-ddr-clkc";
234 clock-names = "xtal";
235 #clock-cells = <1>;
239 compatible = "simple-bus";
241 #address-cells = <1>;
242 #size-cells = <1>;
245 canvas: video-lut@48 {
246 compatible = "amlogic,meson8b-canvas",
254 compatible = "simple-bus";
256 #address-cells = <1>;
257 #size-cells = <1>;
261 compatible = "amlogic,meson8b-mali", "arm,mali-450";
271 interrupt-names = "gp", "gpmmu", "pp", "pmu",
275 clock-names = "bus", "core";
276 operating-points-v2 = <&gpu_opp_table>;
277 #cooling-cells = <2>; /* min followed by max */
283 compatible = "amlogic,aiu-meson8b", "amlogic,aiu";
293 clock-names = "pclk",
307 compatible = "amlogic,meson8b-pmu", "syscon";
312 compatible = "amlogic,meson8b-aobus-pinctrl";
313 #address-cells = <1>;
314 #size-cells = <1>;
321 reg-names = "mux", "pull", "gpio";
322 gpio-controller;
323 #gpio-cells = <2>;
324 gpio-ranges = <&pinctrl_aobus 0 0 16>;
327 i2s_am_clk_pins: i2s-am-clk-out {
331 bias-disable;
335 i2s_out_ao_clk_pins: i2s-ao-clk-out {
339 bias-disable;
343 i2s_out_lr_clk_pins: i2s-lr-clk-out {
347 bias-disable;
351 i2s_out_ch01_ao_pins: i2s-out-ch01 {
355 bias-disable;
359 spdif_out_1_pins: spdif-out-1 {
363 bias-disable;
371 bias-pull-up;
379 bias-disable;
386 compatible = "amlogic,meson8b-ao-arc", "amlogic,meson-mx-ao-arc";
394 reset: reset-controller@4404 {
395 compatible = "amlogic,meson8b-reset";
397 #reset-cells = <1>;
400 analog_top: analog-top@81a8 {
401 compatible = "amlogic,meson8b-analog-top", "syscon";
406 compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";
412 #pwm-cells = <3>;
416 clock-measure@8758 {
417 compatible = "amlogic,meson8b-clk-measure";
422 compatible = "amlogic,meson8b-cbus-pinctrl";
423 #address-cells = <1>;
424 #size-cells = <1>;
432 reg-names = "mux", "pull", "pull-enable", "gpio";
433 gpio-controller;
434 #gpio-cells = <2>;
435 gpio-ranges = <&pinctrl_cbus 0 0 83>;
438 eth_rgmii_pins: eth-rgmii {
456 bias-disable;
460 eth_rmii_pins: eth-rmii {
472 bias-disable;
476 i2c_a_pins: i2c-a {
480 bias-disable;
484 sd_b_pins: sd-b {
489 bias-disable;
493 sdxc_c_pins: sdxc-c {
499 bias-pull-up;
503 pwm_c1_pins: pwm-c1 {
507 bias-disable;
511 pwm_d_pins: pwm-d {
515 bias-disable;
519 uart_b0_pins: uart-b0 {
524 bias-pull-up;
528 uart_b0_cts_rts_pins: uart-b0-cts-rts {
533 bias-disable;
540 ao_arc_sram: aoarc-sram@0 {
541 compatible = "amlogic,meson8b-ao-arc-sram";
546 smp-sram@1ff80 {
547 compatible = "amlogic,meson8b-smp-sram";
554 compatible = "amlogic,meson8b-efuse";
556 clock-names = "core";
565 compatible = "amlogic,meson8b-dwmac", "snps,dwmac-3.70a", "snps,dwmac";
574 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
575 rx-fifo-depth = <4096>;
576 tx-fifo-depth = <2048>;
579 reset-names = "stmmaceth";
581 power-domains = <&pwrc PWRC_MESON8_ETHERNET_MEM_ID>;
585 compatible = "amlogic,meson8b-gpio-intc",
586 "amlogic,meson-gpio-intc";
591 clkc: clock-controller {
592 compatible = "amlogic,meson8b-clkc";
594 clock-names = "xtal", "ddr_pll";
595 #clock-cells = <1>;
596 #reset-cells = <1>;
599 pwrc: power-controller {
600 compatible = "amlogic,meson8b-pwrc";
601 #power-domain-cells = <1>;
602 amlogic,ao-sysctrl = <&pmu>;
614 reset-names = "dblk", "pic_dc", "hdmi_apb", "hdmi_system",
618 clock-names = "vpu";
619 assigned-clocks = <&clkc CLKID_VPU>;
620 assigned-clock-rates = <182142857>;
626 clock-names = "core";
642 arm,data-latency = <3 3 3>;
643 arm,tag-latency = <2 2 2>;
644 arm,filter-ranges = <0x100000 0xc0000000>;
645 prefetch-data = <1>;
646 prefetch-instr = <1>;
647 arm,prefetch-offset = <7>;
648 arm,double-linefill = <1>;
649 arm,prefetch-drop = <1>;
650 arm,shared-override;
655 compatible = "arm,cortex-a5-scu";
660 compatible = "arm,cortex-a5-global-timer";
673 compatible = "arm,cortex-a5-twd-timer";
681 compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";
689 compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";
697 compatible = "amlogic,meson8b-rtc";
702 compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc";
704 clock-names = "clkin", "core";
705 amlogic,hhi-sysctrl = <&hhi>;
706 nvmem-cells = <&temperature_calib>;
707 nvmem-cell-names = "temperature_calib";
711 compatible = "amlogic,meson8-sdhc", "amlogic,meson-mx-sdhc";
717 clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk";
721 secbus2: system-controller@4000 {
722 compatible = "amlogic,meson8b-secbus2", "syscon";
728 compatible = "amlogic,meson8b-sdio", "amlogic,meson-mx-sdio";
730 clock-names = "core", "clkin";
735 clock-names = "xtal", "pclk";
739 compatible = "amlogic,meson8b-uart", "amlogic,meson-ao-uart";
741 clock-names = "xtal", "pclk", "baud";
745 compatible = "amlogic,meson8b-uart";
747 clock-names = "xtal", "pclk", "baud";
751 compatible = "amlogic,meson8b-uart";
753 clock-names = "xtal", "pclk", "baud";
757 compatible = "amlogic,meson8b-uart";
759 clock-names = "xtal", "pclk", "baud";
763 compatible = "amlogic,meson8b-usb", "snps,dwc2";
765 clock-names = "otg";
769 compatible = "amlogic,meson8b-usb", "snps,dwc2";
771 clock-names = "otg";
775 compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy";
777 clock-names = "usb_general", "usb";
782 compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy";
784 clock-names = "usb_general", "usb";
789 compatible = "amlogic,meson8b-wdt";