Lines Matching +full:0 +full:x01c0f000
17 #clock-cells = <0>;
24 #clock-cells = <0>;
33 #size-cells = <0>;
35 cpu@0 {
38 reg = <0x0>;
51 reg = <0x01c00000 0x30>;
58 reg = <0x00010000 0x1000>;
61 ranges = <0 0x00010000 0x1000>;
63 otg_sram: sram-section@0 {
66 reg = <0x0000 0x1000>;
75 reg = <0x01c05000 0x1000>;
83 #size-cells = <0>;
89 reg = <0x01c06000 0x1000>;
97 #size-cells = <0>;
103 reg = <0x01c0f000 0x1000>;
113 pinctrl-0 = <&mmc0_pins>;
116 #size-cells = <0>;
122 reg = <0x01c10000 0x1000>;
133 #size-cells = <0>;
138 reg = <0x01c13000 0x0400>;
143 phys = <&usbphy 0>;
145 extcon = <&usbphy 0>;
152 reg = <0x01c13400 0x10>;
164 reg = <0x01c20000 0x400>;
173 reg = <0x01c20400 0x400>;
180 reg = <0x01c20800 0x400>;
221 reg = <0x01c27000 0x400>;
226 #size-cells = <0>;
233 reg = <0x01c27400 0x400>;
238 #size-cells = <0>;
245 reg = <0x01c27800 0x400>;
250 #size-cells = <0>;
256 reg = <0x01c20c00 0x90>;
264 reg = <0x01c20ca0 0x20>;
272 reg = <0x01c21000 0x400>;
281 reg = <0x01c22c00 0x400>;
292 reg = <0x01c23400 0x400>;
299 reg = <0x01c25000 0x400>;
310 reg = <0x01c25400 0x400>;
321 reg = <0x01c25800 0x400>;