Lines Matching +full:sun8i +full:- +full:h3 +full:- +full:ccu
5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/interrupt-controller/arm-gic.h>
45 #include <dt-bindings/clock/sun6i-rtc.h>
46 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
47 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
51 #address-cells = <1>;
52 #size-cells = <1>;
53 interrupt-parent = <&gic>;
56 #address-cells = <1>;
57 #size-cells = <1>;
60 framebuffer-lcd {
61 compatible = "allwinner,simple-framebuffer",
62 "simple-framebuffer";
63 allwinner,pipeline = "mixer0-lcd0";
65 <&ccu CLK_TCON0>;
71 #address-cells = <1>;
72 #size-cells = <0>;
75 compatible = "arm,cortex-a7";
78 clocks = <&ccu CLK_CPU>;
82 de: display-engine {
83 compatible = "allwinner,sun8i-v3s-display-engine";
89 compatible = "arm,armv7-timer";
97 #address-cells = <1>;
98 #size-cells = <1>;
101 osc24M: osc24M-clk {
102 #clock-cells = <0>;
103 compatible = "fixed-clock";
104 clock-frequency = <24000000>;
105 clock-accuracy = <50000>;
106 clock-output-names = "osc24M";
109 osc32k: osc32k-clk {
110 #clock-cells = <0>;
111 compatible = "fixed-clock";
112 clock-frequency = <32768>;
113 clock-accuracy = <50000>;
114 clock-output-names = "ext-osc32k";
119 compatible = "simple-bus";
120 #address-cells = <1>;
121 #size-cells = <1>;
125 compatible = "allwinner,sun8i-v3s-de2-clk";
127 clocks = <&ccu CLK_BUS_DE>,
128 <&ccu CLK_DE>;
129 clock-names = "bus",
131 resets = <&ccu RST_BUS_DE>;
132 #clock-cells = <1>;
133 #reset-cells = <1>;
137 compatible = "allwinner,sun8i-v3s-de2-mixer";
141 clock-names = "bus",
146 #address-cells = <1>;
147 #size-cells = <0>;
153 remote-endpoint = <&tcon0_in_mixer0>;
159 syscon: system-control@1c00000 {
160 compatible = "allwinner,sun8i-v3s-system-control",
161 "allwinner,sun8i-h3-system-control";
163 #address-cells = <1>;
164 #size-cells = <1>;
168 nmi_intc: interrupt-controller@1c000d0 {
169 compatible = "allwinner,sun8i-v3s-nmi",
170 "allwinner,sun9i-a80-nmi";
171 interrupt-controller;
172 #interrupt-cells = <2>;
177 dma: dma-controller@1c02000 {
178 compatible = "allwinner,sun8i-v3s-dma";
181 clocks = <&ccu CLK_BUS_DMA>;
182 resets = <&ccu RST_BUS_DMA>;
183 #dma-cells = <1>;
186 tcon0: lcd-controller@1c0c000 {
187 compatible = "allwinner,sun8i-v3s-tcon";
190 clocks = <&ccu CLK_BUS_TCON0>,
191 <&ccu CLK_TCON0>;
192 clock-names = "ahb",
193 "tcon-ch0";
194 clock-output-names = "tcon-data-clock";
195 #clock-cells = <0>;
196 resets = <&ccu RST_BUS_TCON0>;
197 reset-names = "lcd";
201 #address-cells = <1>;
202 #size-cells = <0>;
208 remote-endpoint = <&mixer0_out_tcon0>;
213 #address-cells = <1>;
214 #size-cells = <0>;
222 compatible = "allwinner,sun7i-a20-mmc";
224 clocks = <&ccu CLK_BUS_MMC0>,
225 <&ccu CLK_MMC0>,
226 <&ccu CLK_MMC0_OUTPUT>,
227 <&ccu CLK_MMC0_SAMPLE>;
228 clock-names = "ahb",
232 resets = <&ccu RST_BUS_MMC0>;
233 reset-names = "ahb";
235 pinctrl-names = "default";
236 pinctrl-0 = <&mmc0_pins>;
238 #address-cells = <1>;
239 #size-cells = <0>;
243 compatible = "allwinner,sun7i-a20-mmc";
245 clocks = <&ccu CLK_BUS_MMC1>,
246 <&ccu CLK_MMC1>,
247 <&ccu CLK_MMC1_OUTPUT>,
248 <&ccu CLK_MMC1_SAMPLE>;
249 clock-names = "ahb",
253 resets = <&ccu RST_BUS_MMC1>;
254 reset-names = "ahb";
256 pinctrl-names = "default";
257 pinctrl-0 = <&mmc1_pins>;
259 #address-cells = <1>;
260 #size-cells = <0>;
264 compatible = "allwinner,sun7i-a20-mmc";
266 clocks = <&ccu CLK_BUS_MMC2>,
267 <&ccu CLK_MMC2>,
268 <&ccu CLK_MMC2_OUTPUT>,
269 <&ccu CLK_MMC2_SAMPLE>;
270 clock-names = "ahb",
274 resets = <&ccu RST_BUS_MMC2>;
275 reset-names = "ahb";
278 #address-cells = <1>;
279 #size-cells = <0>;
283 compatible = "allwinner,sun8i-v3s-crypto",
284 "allwinner,sun8i-a33-crypto";
287 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
288 clock-names = "ahb", "mod";
290 dma-names = "rx", "tx";
291 resets = <&ccu RST_BUS_CE>;
292 reset-names = "ahb";
296 compatible = "allwinner,sun8i-h3-musb";
298 clocks = <&ccu CLK_BUS_OTG>;
299 resets = <&ccu RST_BUS_OTG>;
301 interrupt-names = "mc";
303 phy-names = "usb";
309 compatible = "allwinner,sun8i-v3s-usb-phy";
312 reg-names = "phy_ctrl",
314 clocks = <&ccu CLK_USB_PHY0>;
315 clock-names = "usb0_phy";
316 resets = <&ccu RST_USB_PHY0>;
317 reset-names = "usb0_reset";
319 #phy-cells = <1>;
323 compatible = "allwinner,sun8i-v3s-ehci", "generic-ehci";
326 clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>;
327 resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
329 phy-names = "usb";
334 compatible = "allwinner,sun8i-v3s-ohci", "generic-ohci";
337 clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>,
338 <&ccu CLK_USB_OHCI0>;
339 resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
341 phy-names = "usb";
345 ccu: clock@1c20000 { label
346 compatible = "allwinner,sun8i-v3s-ccu";
349 clock-names = "hosc", "losc";
350 #clock-cells = <1>;
351 #reset-cells = <1>;
355 #clock-cells = <1>;
356 compatible = "allwinner,sun8i-v3-rtc";
361 clock-output-names = "osc32k", "osc32k-out";
365 compatible = "allwinner,sun8i-v3s-pinctrl";
369 clocks = <&ccu CLK_BUS_PIO>, <&osc24M>,
371 clock-names = "apb", "hosc", "losc";
372 gpio-controller;
373 #gpio-cells = <3>;
374 interrupt-controller;
375 #interrupt-cells = <3>;
377 /omit-if-no-ref/
378 csi0_mclk_pin: csi0-mclk-pin {
383 /omit-if-no-ref/
384 csi1_8bit_pins: csi1-8bit-pins {
391 /omit-if-no-ref/
392 csi1_mclk_pin: csi1-mclk-pin {
397 i2c0_pins: i2c0-pins {
402 /omit-if-no-ref/
403 i2c1_pb_pins: i2c1-pb-pins {
408 /omit-if-no-ref/
409 i2c1_pe_pins: i2c1-pe-pins {
414 uart0_pb_pins: uart0-pb-pins {
419 uart2_pins: uart2-pins {
424 mmc0_pins: mmc0-pins {
428 drive-strength = <30>;
429 bias-pull-up;
432 mmc1_pins: mmc1-pins {
436 drive-strength = <30>;
437 bias-pull-up;
440 /omit-if-no-ref/
441 pwm0_pin: pwm0-pin {
446 /omit-if-no-ref/
447 pwm1_pin: pwm1-pin {
452 spi0_pins: spi0-pins {
459 compatible = "allwinner,sun8i-v3s-timer";
468 compatible = "allwinner,sun6i-a31-wdt";
475 compatible = "allwinner,sun8i-v3s-pwm",
476 "allwinner,sun7i-a20-pwm";
479 #pwm-cells = <3>;
484 compatible = "allwinner,sun4i-a10-lradc-keys";
491 #sound-dai-cells = <0>;
492 compatible = "allwinner,sun8i-v3s-codec";
495 clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
496 clock-names = "apb", "codec";
497 resets = <&ccu RST_BUS_CODEC>;
499 dma-names = "rx", "tx";
500 allwinner,codec-analog-controls = <&codec_analog>;
504 codec_analog: codec-analog@1c23000 {
505 compatible = "allwinner,sun8i-v3s-codec-analog";
510 compatible = "snps,dw-apb-uart";
513 reg-shift = <2>;
514 reg-io-width = <4>;
515 clocks = <&ccu CLK_BUS_UART0>;
517 dma-names = "tx", "rx";
518 resets = <&ccu RST_BUS_UART0>;
523 compatible = "snps,dw-apb-uart";
526 reg-shift = <2>;
527 reg-io-width = <4>;
528 clocks = <&ccu CLK_BUS_UART1>;
530 dma-names = "tx", "rx";
531 resets = <&ccu RST_BUS_UART1>;
536 compatible = "snps,dw-apb-uart";
539 reg-shift = <2>;
540 reg-io-width = <4>;
541 clocks = <&ccu CLK_BUS_UART2>;
543 dma-names = "tx", "rx";
544 resets = <&ccu RST_BUS_UART2>;
545 pinctrl-0 = <&uart2_pins>;
546 pinctrl-names = "default";
551 compatible = "allwinner,sun6i-a31-i2c";
554 clocks = <&ccu CLK_BUS_I2C0>;
555 resets = <&ccu RST_BUS_I2C0>;
556 pinctrl-names = "default";
557 pinctrl-0 = <&i2c0_pins>;
559 #address-cells = <1>;
560 #size-cells = <0>;
564 compatible = "allwinner,sun6i-a31-i2c";
567 clocks = <&ccu CLK_BUS_I2C1>;
568 resets = <&ccu RST_BUS_I2C1>;
570 #address-cells = <1>;
571 #size-cells = <0>;
575 compatible = "allwinner,sun8i-v3s-emac";
579 interrupt-names = "macirq";
580 resets = <&ccu RST_BUS_EMAC>;
581 reset-names = "stmmaceth";
582 clocks = <&ccu CLK_BUS_EMAC>;
583 clock-names = "stmmaceth";
584 phy-handle = <&int_mii_phy>;
585 phy-mode = "mii";
589 #address-cells = <1>;
590 #size-cells = <0>;
591 compatible = "snps,dwmac-mdio";
594 mdio_mux: mdio-mux {
595 compatible = "allwinner,sun8i-h3-mdio-mux";
596 #address-cells = <1>;
597 #size-cells = <0>;
599 mdio-parent-bus = <&mdio>;
602 compatible = "allwinner,sun8i-h3-mdio-internal";
604 #address-cells = <1>;
605 #size-cells = <0>;
607 int_mii_phy: ethernet-phy@1 {
608 compatible = "ethernet-phy-ieee802.3-c22";
610 clocks = <&ccu CLK_BUS_EPHY>;
611 resets = <&ccu RST_BUS_EPHY>;
618 compatible = "allwinner,sun8i-h3-spi";
621 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
622 clock-names = "ahb", "mod";
624 dma-names = "rx", "tx";
625 pinctrl-names = "default";
626 pinctrl-0 = <&spi0_pins>;
627 resets = <&ccu RST_BUS_SPI0>;
629 #address-cells = <1>;
630 #size-cells = <0>;
633 gic: interrupt-controller@1c81000 {
634 compatible = "arm,gic-400";
639 interrupt-controller;
640 #interrupt-cells = <3>;
645 compatible = "allwinner,sun8i-v3s-csi";
648 clocks = <&ccu CLK_BUS_CSI>,
649 <&ccu CLK_CSI1_SCLK>,
650 <&ccu CLK_DRAM_CSI>;
651 clock-names = "bus", "mod", "ram";
652 resets = <&ccu RST_BUS_CSI>;