Lines Matching +full:iio +full:- +full:aux
2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include "sun8i-a23-a33.dtsi"
46 #include <dt-bindings/thermal/thermal.h>
49 cpu0_opp_table: opp-table-cpu {
50 compatible = "operating-points-v2";
51 opp-shared;
53 opp-120000000 {
54 opp-hz = /bits/ 64 <120000000>;
55 opp-microvolt = <1040000>;
56 clock-latency-ns = <244144>; /* 8 32k periods */
59 opp-240000000 {
60 opp-hz = /bits/ 64 <240000000>;
61 opp-microvolt = <1040000>;
62 clock-latency-ns = <244144>; /* 8 32k periods */
65 opp-312000000 {
66 opp-hz = /bits/ 64 <312000000>;
67 opp-microvolt = <1040000>;
68 clock-latency-ns = <244144>; /* 8 32k periods */
71 opp-408000000 {
72 opp-hz = /bits/ 64 <408000000>;
73 opp-microvolt = <1040000>;
74 clock-latency-ns = <244144>; /* 8 32k periods */
77 opp-480000000 {
78 opp-hz = /bits/ 64 <480000000>;
79 opp-microvolt = <1040000>;
80 clock-latency-ns = <244144>; /* 8 32k periods */
83 opp-504000000 {
84 opp-hz = /bits/ 64 <504000000>;
85 opp-microvolt = <1040000>;
86 clock-latency-ns = <244144>; /* 8 32k periods */
89 opp-600000000 {
90 opp-hz = /bits/ 64 <600000000>;
91 opp-microvolt = <1040000>;
92 clock-latency-ns = <244144>; /* 8 32k periods */
95 opp-648000000 {
96 opp-hz = /bits/ 64 <648000000>;
97 opp-microvolt = <1040000>;
98 clock-latency-ns = <244144>; /* 8 32k periods */
101 opp-720000000 {
102 opp-hz = /bits/ 64 <720000000>;
103 opp-microvolt = <1100000>;
104 clock-latency-ns = <244144>; /* 8 32k periods */
107 opp-816000000 {
108 opp-hz = /bits/ 64 <816000000>;
109 opp-microvolt = <1100000>;
110 clock-latency-ns = <244144>; /* 8 32k periods */
113 opp-912000000 {
114 opp-hz = /bits/ 64 <912000000>;
115 opp-microvolt = <1200000>;
116 clock-latency-ns = <244144>; /* 8 32k periods */
119 opp-1008000000 {
120 opp-hz = /bits/ 64 <1008000000>;
121 opp-microvolt = <1200000>;
122 clock-latency-ns = <244144>; /* 8 32k periods */
129 clock-names = "cpu";
130 operating-points-v2 = <&cpu0_opp_table>;
131 #cooling-cells = <2>;
136 clock-names = "cpu";
137 operating-points-v2 = <&cpu0_opp_table>;
138 #cooling-cells = <2>;
142 compatible = "arm,cortex-a7";
146 clock-names = "cpu";
147 operating-points-v2 = <&cpu0_opp_table>;
148 #cooling-cells = <2>;
152 compatible = "arm,cortex-a7";
156 clock-names = "cpu";
157 operating-points-v2 = <&cpu0_opp_table>;
158 #cooling-cells = <2>;
162 iio-hwmon {
163 compatible = "iio-hwmon";
164 io-channels = <&ths>;
167 mali_opp_table: opp-table-gpu {
168 compatible = "operating-points-v2";
170 opp-144000000 {
171 opp-hz = /bits/ 64 <144000000>;
174 opp-240000000 {
175 opp-hz = /bits/ 64 <240000000>;
178 opp-384000000 {
179 opp-hz = /bits/ 64 <384000000>;
184 compatible = "simple-audio-card";
185 simple-audio-card,name = "sun8i-a33-audio";
186 simple-audio-card,format = "i2s";
187 simple-audio-card,frame-master = <&link_codec>;
188 simple-audio-card,bitclock-master = <&link_codec>;
189 simple-audio-card,mclk-fs = <128>;
190 simple-audio-card,aux-devs = <&codec_analog>;
191 simple-audio-card,routing =
196 simple-audio-card,cpu {
197 sound-dai = <&dai>;
200 link_codec: simple-audio-card,codec {
201 sound-dai = <&codec 0>;
206 video-codec@1c0e000 {
207 compatible = "allwinner,sun8i-a33-video-engine";
211 clock-names = "ahb", "mod", "ram";
217 crypto: crypto-engine@1c15000 {
218 compatible = "allwinner,sun8i-a33-crypto";
222 clock-names = "ahb", "mod";
224 reset-names = "ahb";
228 #sound-dai-cells = <0>;
229 compatible = "allwinner,sun6i-a31-i2s";
233 clock-names = "apb", "mod";
236 dma-names = "rx", "tx";
241 #sound-dai-cells = <1>;
242 compatible = "allwinner,sun8i-a33-codec";
246 clock-names = "bus", "mod";
251 compatible = "allwinner,sun8i-a33-ths";
253 #thermal-sensor-cells = <0>;
254 #io-channel-cells = <0>;
258 compatible = "allwinner,sun6i-a31-mipi-dsi";
263 clock-names = "bus", "mod";
266 phy-names = "dphy";
268 #address-cells = <1>;
269 #size-cells = <0>;
273 remote-endpoint = <&tcon0_out_dsi>;
278 dphy: d-phy@1ca1000 {
279 compatible = "allwinner,sun6i-a31-mipi-dphy";
284 clock-names = "bus", "mod";
287 #phy-cells = <0>;
291 thermal-zones {
292 cpu-thermal {
294 polling-delay-passive = <250>;
295 polling-delay = <1000>;
296 thermal-sensors = <&ths>;
298 cooling-maps {
301 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
308 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
316 cooling-device = <&mali 1 THERMAL_NO_LIMIT>;
321 cooling-device = <&mali 2 THERMAL_NO_LIMIT>;
326 cpu_alert0: cpu-alert0 {
333 gpu_alert0: gpu-alert0 {
340 cpu_alert1: cpu-alert1 {
347 gpu_alert1: gpu-alert1 {
354 cpu_crit: cpu-crit {
366 compatible = "allwinner,sun8i-a33-display-backend";
369 reg-names = "be", "sat";
372 clock-names = "ahb", "mod",
375 reset-names = "be", "sat";
379 compatible = "allwinner,sun8i-a33-ccu";
383 compatible = "allwinner,sun8i-a33-display-engine";
387 compatible = "allwinner,sun8i-a33-drc";
391 compatible = "allwinner,sun8i-a33-display-frontend";
395 operating-points-v2 = <&mali_opp_table>;
399 compatible = "allwinner,sun8i-a33-pinctrl";
403 uart0_pb_pins: uart0-pb-pins {
411 compatible = "allwinner,sun8i-a33-tcon";
415 #address-cells = <1>;
416 #size-cells = <0>;
420 remote-endpoint = <&dsi_in_tcon0>;
425 compatible = "allwinner,sun8i-a33-musb";
429 compatible = "allwinner,sun8i-a33-usb-phy";
431 reg-names = "phy_ctrl", "pmu1";