Lines Matching +full:pmu +full:- +full:sram
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
47 #include <dt-bindings/dma/sun4i-a10.h>
48 #include <dt-bindings/clock/sun7i-a20-ccu.h>
49 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <1>;
62 #address-cells = <1>;
63 #size-cells = <1>;
66 framebuffer-lcd0-hdmi {
67 compatible = "allwinner,simple-framebuffer",
68 "simple-framebuffer";
69 allwinner,pipeline = "de_be0-lcd0-hdmi";
77 framebuffer-lcd0 {
78 compatible = "allwinner,simple-framebuffer",
79 "simple-framebuffer";
80 allwinner,pipeline = "de_be0-lcd0";
87 framebuffer-lcd0-tve0 {
88 compatible = "allwinner,simple-framebuffer",
89 "simple-framebuffer";
90 allwinner,pipeline = "de_be0-lcd0-tve0";
100 #address-cells = <1>;
101 #size-cells = <0>;
104 compatible = "arm,cortex-a7";
108 clock-latency = <244144>; /* 8 32k periods */
109 operating-points =
118 #cooling-cells = <2>;
122 compatible = "arm,cortex-a7";
126 clock-latency = <244144>; /* 8 32k periods */
127 operating-points =
136 #cooling-cells = <2>;
140 thermal-zones {
141 cpu-thermal {
143 polling-delay-passive = <250>;
144 polling-delay = <1000>;
145 thermal-sensors = <&rtp>;
147 cooling-maps {
150 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
156 cpu_alert0: cpu-alert0 {
163 cpu_crit: cpu-crit {
173 reserved-memory {
174 #address-cells = <1>;
175 #size-cells = <1>;
179 default-pool {
180 compatible = "shared-dma-pool";
182 alloc-ranges = <0x40000000 0x10000000>;
184 linux,cma-default;
189 compatible = "arm,armv7-timer";
196 pmu {
197 compatible = "arm,cortex-a7-pmu";
203 #address-cells = <1>;
204 #size-cells = <1>;
207 osc24M: clk-24M {
208 #clock-cells = <0>;
209 compatible = "fixed-clock";
210 clock-frequency = <24000000>;
211 clock-output-names = "osc24M";
214 osc32k: clk-32k {
215 #clock-cells = <0>;
216 compatible = "fixed-clock";
217 clock-frequency = <32768>;
218 clock-output-names = "osc32k";
225 * mode, using clk_set_rate auto-reparenting.
230 mii_phy_tx_clk: clk-mii-phy-tx {
231 #clock-cells = <0>;
232 compatible = "fixed-clock";
233 clock-frequency = <25000000>;
234 clock-output-names = "mii_phy_tx";
237 gmac_int_tx_clk: clk-gmac-int-tx {
238 #clock-cells = <0>;
239 compatible = "fixed-clock";
240 clock-frequency = <125000000>;
241 clock-output-names = "gmac_int_tx";
245 #clock-cells = <0>;
246 compatible = "allwinner,sun7i-a20-gmac-clk";
249 clock-output-names = "gmac_tx";
254 de: display-engine {
255 compatible = "allwinner,sun7i-a20-display-engine";
261 compatible = "simple-bus";
262 #address-cells = <1>;
263 #size-cells = <1>;
266 system-control@1c00000 {
267 compatible = "allwinner,sun7i-a20-system-control",
268 "allwinner,sun4i-a10-system-control";
270 #address-cells = <1>;
271 #size-cells = <1>;
274 sram_a: sram@0 {
275 compatible = "mmio-sram";
277 #address-cells = <1>;
278 #size-cells = <1>;
281 emac_sram: sram-section@8000 {
282 compatible = "allwinner,sun7i-a20-sram-a3-a4",
283 "allwinner,sun4i-a10-sram-a3-a4";
289 sram_d: sram@10000 {
290 compatible = "mmio-sram";
292 #address-cells = <1>;
293 #size-cells = <1>;
296 otg_sram: sram-section@0 {
297 compatible = "allwinner,sun7i-a20-sram-d",
298 "allwinner,sun4i-a10-sram-d";
304 sram_c: sram@1d00000 {
305 compatible = "mmio-sram";
307 #address-cells = <1>;
308 #size-cells = <1>;
311 ve_sram: sram-section@0 {
312 compatible = "allwinner,sun7i-a20-sram-c1",
313 "allwinner,sun4i-a10-sram-c1";
319 nmi_intc: interrupt-controller@1c00030 {
320 compatible = "allwinner,sun7i-a20-sc-nmi";
321 interrupt-controller;
322 #interrupt-cells = <2>;
327 dma: dma-controller@1c02000 {
328 compatible = "allwinner,sun4i-a10-dma";
332 #dma-cells = <2>;
335 nfc: nand-controller@1c03000 {
336 compatible = "allwinner,sun4i-a10-nand";
340 clock-names = "ahb", "mod";
342 dma-names = "rxtx";
344 #address-cells = <1>;
345 #size-cells = <0>;
349 compatible = "allwinner,sun4i-a10-spi";
353 clock-names = "ahb", "mod";
356 dma-names = "rx", "tx";
358 #address-cells = <1>;
359 #size-cells = <0>;
360 num-cs = <4>;
364 compatible = "allwinner,sun4i-a10-spi";
368 clock-names = "ahb", "mod";
371 dma-names = "rx", "tx";
373 #address-cells = <1>;
374 #size-cells = <0>;
375 num-cs = <1>;
379 compatible = "allwinner,sun7i-a20-csi0";
383 clock-names = "bus", "isp", "ram";
389 compatible = "allwinner,sun4i-a10-emac";
393 allwinner,sram = <&emac_sram 1>;
398 compatible = "allwinner,sun4i-a10-mdio";
401 #address-cells = <1>;
402 #size-cells = <0>;
405 tcon0: lcd-controller@1c0c000 {
406 compatible = "allwinner,sun7i-a20-tcon0",
407 "allwinner,sun7i-a20-tcon";
411 reset-names = "lcd", "lvds";
415 clock-names = "ahb",
416 "tcon-ch0",
417 "tcon-ch1";
418 clock-output-names = "tcon0-pixel-clock";
419 #clock-cells = <0>;
423 #address-cells = <1>;
424 #size-cells = <0>;
427 #address-cells = <1>;
428 #size-cells = <0>;
433 remote-endpoint = <&be0_out_tcon0>;
438 remote-endpoint = <&be1_out_tcon0>;
443 #address-cells = <1>;
444 #size-cells = <0>;
449 remote-endpoint = <&hdmi_in_tcon0>;
450 allwinner,tcon-channel = <1>;
456 tcon1: lcd-controller@1c0d000 {
457 compatible = "allwinner,sun7i-a20-tcon1",
458 "allwinner,sun7i-a20-tcon";
462 reset-names = "lcd";
466 clock-names = "ahb",
467 "tcon-ch0",
468 "tcon-ch1";
469 clock-output-names = "tcon1-pixel-clock";
470 #clock-cells = <0>;
474 #address-cells = <1>;
475 #size-cells = <0>;
478 #address-cells = <1>;
479 #size-cells = <0>;
484 remote-endpoint = <&be0_out_tcon1>;
489 remote-endpoint = <&be1_out_tcon1>;
494 #address-cells = <1>;
495 #size-cells = <0>;
500 remote-endpoint = <&hdmi_in_tcon1>;
501 allwinner,tcon-channel = <1>;
507 video-codec@1c0e000 {
508 compatible = "allwinner,sun7i-a20-video-engine";
512 clock-names = "ahb", "mod", "ram";
515 allwinner,sram = <&ve_sram 1>;
519 compatible = "allwinner,sun7i-a20-mmc";
525 clock-names = "ahb",
530 pinctrl-names = "default";
531 pinctrl-0 = <&mmc0_pins>;
533 #address-cells = <1>;
534 #size-cells = <0>;
538 compatible = "allwinner,sun7i-a20-mmc";
544 clock-names = "ahb",
550 #address-cells = <1>;
551 #size-cells = <0>;
555 compatible = "allwinner,sun7i-a20-mmc";
561 clock-names = "ahb",
566 pinctrl-names = "default";
567 pinctrl-0 = <&mmc2_pins>;
569 #address-cells = <1>;
570 #size-cells = <0>;
574 compatible = "allwinner,sun7i-a20-mmc";
580 clock-names = "ahb",
585 pinctrl-names = "default";
586 pinctrl-0 = <&mmc3_pins>;
588 #address-cells = <1>;
589 #size-cells = <0>;
593 compatible = "allwinner,sun4i-a10-musb";
597 interrupt-names = "mc";
599 phy-names = "usb";
601 allwinner,sram = <&otg_sram 1>;
607 #phy-cells = <1>;
608 compatible = "allwinner,sun7i-a20-usb-phy";
610 reg-names = "phy_ctrl", "pmu1", "pmu2";
612 clock-names = "usb_phy";
616 reset-names = "usb0_reset", "usb1_reset", "usb2_reset";
621 compatible = "allwinner,sun7i-a20-ehci", "generic-ehci";
626 phy-names = "usb";
631 compatible = "allwinner,sun7i-a20-ohci", "generic-ohci";
636 phy-names = "usb";
640 crypto: crypto-engine@1c15000 {
641 compatible = "allwinner,sun7i-a20-crypto",
642 "allwinner,sun4i-a10-crypto";
646 clock-names = "ahb", "mod";
650 compatible = "allwinner,sun7i-a20-hdmi",
651 "allwinner,sun5i-a10s-hdmi";
657 clock-names = "ahb", "mod", "pll-0", "pll-1";
661 dma-names = "ddc-tx", "ddc-rx", "audio-tx";
665 #address-cells = <1>;
666 #size-cells = <0>;
669 #address-cells = <1>;
670 #size-cells = <0>;
675 remote-endpoint = <&tcon0_out_hdmi>;
680 remote-endpoint = <&tcon1_out_hdmi>;
691 compatible = "allwinner,sun4i-a10-spi";
695 clock-names = "ahb", "mod";
698 dma-names = "rx", "tx";
700 #address-cells = <1>;
701 #size-cells = <0>;
702 num-cs = <1>;
706 compatible = "allwinner,sun4i-a10-ahci";
714 compatible = "allwinner,sun7i-a20-ehci", "generic-ehci";
719 phy-names = "usb";
724 compatible = "allwinner,sun7i-a20-ohci", "generic-ohci";
729 phy-names = "usb";
734 compatible = "allwinner,sun7i-a20-csi1",
735 "allwinner,sun4i-a10-csi1";
739 clock-names = "bus", "ram";
745 compatible = "allwinner,sun4i-a10-spi";
749 clock-names = "ahb", "mod";
752 dma-names = "rx", "tx";
754 #address-cells = <1>;
755 #size-cells = <0>;
756 num-cs = <1>;
760 compatible = "allwinner,sun7i-a20-ccu";
763 clock-names = "hosc", "losc";
764 #clock-cells = <1>;
765 #reset-cells = <1>;
769 compatible = "allwinner,sun7i-a20-pinctrl";
773 clock-names = "apb", "hosc", "losc";
774 gpio-controller;
775 interrupt-controller;
776 #interrupt-cells = <3>;
777 #gpio-cells = <3>;
779 /omit-if-no-ref/
780 can_pa_pins: can-pa-pins {
785 /omit-if-no-ref/
786 can_ph_pins: can-ph-pins {
791 /omit-if-no-ref/
792 clk_out_a_pin: clk-out-a-pin {
797 /omit-if-no-ref/
798 clk_out_b_pin: clk-out-b-pin {
803 /omit-if-no-ref/
804 csi0_8bits_pins: csi-8bits-pins {
811 /omit-if-no-ref/
812 csi0_clk_pin: csi-clk-pin {
817 /omit-if-no-ref/
818 csi1_8bits_pg_pins: csi1-8bits-pg-pins {
825 /omit-if-no-ref/
826 csi1_24bits_ph_pins: csi1-24bits-ph-pins {
836 /omit-if-no-ref/
837 csi1_clk_pg_pin: csi1-clk-pg-pin {
842 /omit-if-no-ref/
843 emac_pa_pins: emac-pa-pins {
852 /omit-if-no-ref/
853 emac_ph_pins: emac-ph-pins {
862 /omit-if-no-ref/
863 gmac_mii_pins: gmac-mii-pins {
872 /omit-if-no-ref/
873 gmac_rgmii_pins: gmac-rgmii-pins {
884 drive-strength = <40>;
887 /omit-if-no-ref/
888 i2c0_pins: i2c0-pins {
893 /omit-if-no-ref/
894 i2c1_pins: i2c1-pins {
899 /omit-if-no-ref/
900 i2c2_pins: i2c2-pins {
905 /omit-if-no-ref/
906 i2c3_pins: i2c3-pins {
911 /omit-if-no-ref/
912 ir0_rx_pin: ir0-rx-pin {
917 /omit-if-no-ref/
918 ir0_tx_pin: ir0-tx-pin {
923 /omit-if-no-ref/
924 ir1_rx_pin: ir1-rx-pin {
929 /omit-if-no-ref/
930 ir1_tx_pin: ir1-tx-pin {
935 /omit-if-no-ref/
936 lcd_lvds0_pins: lcd-lvds0-pins {
942 /omit-if-no-ref/
943 lcd_lvds1_pins: lcd-lvds1-pins {
949 /omit-if-no-ref/
950 mmc0_pins: mmc0-pins {
954 drive-strength = <30>;
955 bias-pull-up;
958 /omit-if-no-ref/
959 mmc2_pins: mmc2-pins {
963 drive-strength = <30>;
964 bias-pull-up;
967 /omit-if-no-ref/
968 mmc3_pins: mmc3-pins {
972 drive-strength = <30>;
973 bias-pull-up;
976 /omit-if-no-ref/
977 ps2_0_pins: ps2-0-pins {
982 /omit-if-no-ref/
983 ps2_1_ph_pins: ps2-1-ph-pins {
988 /omit-if-no-ref/
989 pwm0_pin: pwm0-pin {
994 /omit-if-no-ref/
995 pwm1_pin: pwm1-pin {
1000 /omit-if-no-ref/
1001 spdif_tx_pin: spdif-tx-pin {
1004 bias-pull-up;
1007 /omit-if-no-ref/
1008 spi0_pi_pins: spi0-pi-pins {
1013 /omit-if-no-ref/
1014 spi0_cs0_pi_pin: spi0-cs0-pi-pin {
1019 /omit-if-no-ref/
1020 spi0_cs1_pi_pin: spi0-cs1-pi-pin {
1025 /omit-if-no-ref/
1026 spi1_pi_pins: spi1-pi-pins {
1031 /omit-if-no-ref/
1032 spi1_cs0_pi_pin: spi1-cs0-pi-pin {
1037 /omit-if-no-ref/
1038 spi2_pb_pins: spi2-pb-pins {
1043 /omit-if-no-ref/
1044 spi2_cs0_pb_pin: spi2-cs0-pb-pin {
1049 /omit-if-no-ref/
1050 spi2_pc_pins: spi2-pc-pins {
1055 /omit-if-no-ref/
1056 spi2_cs0_pc_pin: spi2-cs0-pc-pin {
1061 /omit-if-no-ref/
1062 uart0_pb_pins: uart0-pb-pins {
1067 /omit-if-no-ref/
1068 uart0_pf_pins: uart0-pf-pins {
1073 /omit-if-no-ref/
1074 uart1_pa_pins: uart1-pa-pins {
1079 /omit-if-no-ref/
1080 uart1_cts_rts_pa_pins: uart1-cts-rts-pa-pins {
1085 /omit-if-no-ref/
1086 uart2_pa_pins: uart2-pa-pins {
1091 /omit-if-no-ref/
1092 uart2_cts_rts_pa_pins: uart2-cts-rts-pa-pins {
1097 /omit-if-no-ref/
1098 uart2_pi_pins: uart2-pi-pins {
1103 /omit-if-no-ref/
1104 uart2_cts_rts_pi_pins: uart2-cts-rts-pi-pins {
1109 /omit-if-no-ref/
1110 uart3_pg_pins: uart3-pg-pins {
1115 /omit-if-no-ref/
1116 uart3_cts_rts_pg_pins: uart3-cts-rts-pg-pins {
1121 /omit-if-no-ref/
1122 uart3_ph_pins: uart3-ph-pins {
1127 /omit-if-no-ref/
1128 uart3_cts_rts_ph_pins: uart3-cts-rts-ph-pins {
1133 /omit-if-no-ref/
1134 uart4_pg_pins: uart4-pg-pins {
1139 /omit-if-no-ref/
1140 uart4_ph_pins: uart4-ph-pins {
1145 /omit-if-no-ref/
1146 uart5_ph_pins: uart5-ph-pins {
1151 /omit-if-no-ref/
1152 uart5_pi_pins: uart5-pi-pins {
1157 /omit-if-no-ref/
1158 uart6_pa_pins: uart6-pa-pins {
1163 /omit-if-no-ref/
1164 uart6_pi_pins: uart6-pi-pins {
1169 /omit-if-no-ref/
1170 uart7_pa_pins: uart7-pa-pins {
1175 /omit-if-no-ref/
1176 uart7_pi_pins: uart7-pi-pins {
1183 compatible = "allwinner,sun4i-a10-timer";
1195 compatible = "allwinner,sun4i-a10-wdt";
1202 compatible = "allwinner,sun7i-a20-rtc";
1208 compatible = "allwinner,sun7i-a20-pwm";
1211 #pwm-cells = <3>;
1216 #sound-dai-cells = <0>;
1217 compatible = "allwinner,sun4i-a10-spdif";
1221 clock-names = "apb", "spdif";
1224 dma-names = "rx", "tx";
1229 compatible = "allwinner,sun4i-a10-ir";
1231 clock-names = "apb", "ir";
1238 compatible = "allwinner,sun4i-a10-ir";
1240 clock-names = "apb", "ir";
1247 #sound-dai-cells = <0>;
1248 compatible = "allwinner,sun4i-a10-i2s";
1252 clock-names = "apb", "mod";
1255 dma-names = "rx", "tx";
1260 #sound-dai-cells = <0>;
1261 compatible = "allwinner,sun4i-a10-i2s";
1265 clock-names = "apb", "mod";
1268 dma-names = "rx", "tx";
1273 compatible = "allwinner,sun4i-a10-lradc-keys";
1280 #sound-dai-cells = <0>;
1281 compatible = "allwinner,sun7i-a20-codec";
1285 clock-names = "apb", "codec";
1288 dma-names = "rx", "tx";
1293 compatible = "allwinner,sun7i-a20-sid";
1298 #sound-dai-cells = <0>;
1299 compatible = "allwinner,sun4i-a10-i2s";
1303 clock-names = "apb", "mod";
1306 dma-names = "rx", "tx";
1311 compatible = "allwinner,sun5i-a13-ts";
1314 #thermal-sensor-cells = <0>;
1318 compatible = "snps,dw-apb-uart";
1321 reg-shift = <2>;
1322 reg-io-width = <4>;
1328 compatible = "snps,dw-apb-uart";
1331 reg-shift = <2>;
1332 reg-io-width = <4>;
1338 compatible = "snps,dw-apb-uart";
1341 reg-shift = <2>;
1342 reg-io-width = <4>;
1348 compatible = "snps,dw-apb-uart";
1351 reg-shift = <2>;
1352 reg-io-width = <4>;
1358 compatible = "snps,dw-apb-uart";
1361 reg-shift = <2>;
1362 reg-io-width = <4>;
1368 compatible = "snps,dw-apb-uart";
1371 reg-shift = <2>;
1372 reg-io-width = <4>;
1378 compatible = "snps,dw-apb-uart";
1381 reg-shift = <2>;
1382 reg-io-width = <4>;
1388 compatible = "snps,dw-apb-uart";
1391 reg-shift = <2>;
1392 reg-io-width = <4>;
1398 compatible = "allwinner,sun4i-a10-ps2";
1406 compatible = "allwinner,sun4i-a10-ps2";
1414 compatible = "allwinner,sun7i-a20-i2c",
1415 "allwinner,sun4i-a10-i2c";
1419 pinctrl-names = "default";
1420 pinctrl-0 = <&i2c0_pins>;
1422 #address-cells = <1>;
1423 #size-cells = <0>;
1427 compatible = "allwinner,sun7i-a20-i2c",
1428 "allwinner,sun4i-a10-i2c";
1432 pinctrl-names = "default";
1433 pinctrl-0 = <&i2c1_pins>;
1435 #address-cells = <1>;
1436 #size-cells = <0>;
1440 compatible = "allwinner,sun7i-a20-i2c",
1441 "allwinner,sun4i-a10-i2c";
1445 pinctrl-names = "default";
1446 pinctrl-0 = <&i2c2_pins>;
1448 #address-cells = <1>;
1449 #size-cells = <0>;
1453 compatible = "allwinner,sun7i-a20-i2c",
1454 "allwinner,sun4i-a10-i2c";
1458 pinctrl-names = "default";
1459 pinctrl-0 = <&i2c3_pins>;
1461 #address-cells = <1>;
1462 #size-cells = <0>;
1466 compatible = "allwinner,sun7i-a20-can",
1467 "allwinner,sun4i-a10-can";
1475 compatible = "allwinner,sun7i-a20-i2c",
1476 "allwinner,sun4i-a10-i2c";
1481 #address-cells = <1>;
1482 #size-cells = <0>;
1486 compatible = "allwinner,sun7i-a20-mali", "arm,mali-400";
1495 interrupt-names = "gp",
1501 "pmu";
1503 clock-names = "bus", "core";
1506 assigned-clocks = <&ccu CLK_GPU>;
1507 assigned-clock-rates = <384000000>;
1511 compatible = "allwinner,sun7i-a20-gmac";
1514 interrupt-names = "macirq";
1516 clock-names = "stmmaceth", "allwinner_gmac_tx";
1518 snps,fixed-burst;
1523 compatible = "snps,dwmac-mdio";
1524 #address-cells = <1>;
1525 #size-cells = <0>;
1530 compatible = "allwinner,sun7i-a20-hstimer";
1539 gic: interrupt-controller@1c81000 {
1540 compatible = "arm,gic-400";
1545 interrupt-controller;
1546 #interrupt-cells = <3>;
1550 fe0: display-frontend@1e00000 {
1551 compatible = "allwinner,sun7i-a20-display-frontend";
1556 clock-names = "ahb", "mod",
1561 #address-cells = <1>;
1562 #size-cells = <0>;
1565 #address-cells = <1>;
1566 #size-cells = <0>;
1571 remote-endpoint = <&be0_in_fe0>;
1576 remote-endpoint = <&be1_in_fe0>;
1582 fe1: display-frontend@1e20000 {
1583 compatible = "allwinner,sun7i-a20-display-frontend";
1588 clock-names = "ahb", "mod",
1593 #address-cells = <1>;
1594 #size-cells = <0>;
1597 #address-cells = <1>;
1598 #size-cells = <0>;
1603 remote-endpoint = <&be0_in_fe1>;
1608 remote-endpoint = <&be1_in_fe1>;
1614 be1: display-backend@1e40000 {
1615 compatible = "allwinner,sun7i-a20-display-backend";
1620 clock-names = "ahb", "mod",
1625 #address-cells = <1>;
1626 #size-cells = <0>;
1629 #address-cells = <1>;
1630 #size-cells = <0>;
1635 remote-endpoint = <&fe0_out_be1>;
1640 remote-endpoint = <&fe1_out_be1>;
1645 #address-cells = <1>;
1646 #size-cells = <0>;
1651 remote-endpoint = <&tcon0_in_be1>;
1656 remote-endpoint = <&tcon1_in_be1>;
1662 be0: display-backend@1e60000 {
1663 compatible = "allwinner,sun7i-a20-display-backend";
1668 clock-names = "ahb", "mod",
1673 #address-cells = <1>;
1674 #size-cells = <0>;
1677 #address-cells = <1>;
1678 #size-cells = <0>;
1683 remote-endpoint = <&fe0_out_be0>;
1688 remote-endpoint = <&fe1_out_be0>;
1693 #address-cells = <1>;
1694 #size-cells = <0>;
1699 remote-endpoint = <&tcon0_in_be0>;
1704 remote-endpoint = <&tcon1_in_be0>;