Lines Matching full:ccu

45 #include <dt-bindings/clock/sun5i-ccu.h>
47 #include <dt-bindings/reset/sun5i-ccu.h>
62 			clocks = <&ccu CLK_CPU>;
75 			clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
76 				 <&ccu CLK_TCON_CH0>, <&ccu CLK_DRAM_DE_BE>;
84 			clocks = <&ccu CLK_AHB_TVE>, <&ccu CLK_AHB_LCD>,
85 				 <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
86 				 <&ccu CLK_TCON_CH1>, <&ccu CLK_DRAM_DE_BE>;
188 			clocks = <&ccu CLK_MBUS>;
199 			clocks = <&ccu CLK_AHB_DMA>;
207 			clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>;
220 			clocks = <&ccu CLK_AHB_SPI0>, <&ccu CLK_SPI0>;
234 			clocks = <&ccu CLK_AHB_SPI1>, <&ccu CLK_SPI1>;
247 			clocks = <&ccu CLK_AHB_TVE>;
248 			resets = <&ccu RST_TVE>;
263 			clocks = <&ccu CLK_AHB_EMAC>;
281 			resets = <&ccu RST_LCD>;
283 			clocks = <&ccu CLK_AHB_LCD>,
284 				 <&ccu CLK_TCON_CH0>,
285 				 <&ccu CLK_TCON_CH1>;
322 			clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>,
323 				 <&ccu CLK_DRAM_VE>;
325 			resets = <&ccu RST_VE>;
333 			clocks = <&ccu CLK_AHB_MMC0>, <&ccu CLK_MMC0>;
346 			clocks = <&ccu CLK_AHB_MMC1>, <&ccu CLK_MMC1>;
357 			clocks = <&ccu CLK_AHB_MMC2>, <&ccu CLK_MMC2>;
368 			clocks = <&ccu CLK_AHB_OTG>;
384 			clocks = <&ccu CLK_USB_PHY0>;
386 			resets = <&ccu RST_USB_PHY0>, <&ccu RST_USB_PHY1>;
395 			clocks = <&ccu CLK_AHB_EHCI>;
405 			clocks = <&ccu CLK_USB_OHCI>, <&ccu CLK_AHB_OHCI>;
416 			clocks = <&ccu CLK_AHB_SS>, <&ccu CLK_SS>;
424 			clocks = <&ccu CLK_AHB_SPI2>, <&ccu CLK_SPI2>;
434 		ccu: clock@1c20000 {  label
452 			clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
611 			clocks = <&ccu CLK_HOSC>;
623 			clocks = <&ccu CLK_APB0_IR>, <&ccu CLK_IR>;
642 			clocks = <&ccu CLK_APB0_CODEC>, <&ccu CLK_CODEC>;
668 			clocks = <&ccu CLK_APB1_UART0>;
678 			clocks = <&ccu CLK_APB1_UART1>;
688 			clocks = <&ccu CLK_APB1_UART2>;
698 			clocks = <&ccu CLK_APB1_UART3>;
706 			clocks = <&ccu CLK_APB1_I2C0>;
718 			clocks = <&ccu CLK_APB1_I2C1>;
730 			clocks = <&ccu CLK_APB1_I2C2>;
743 			clocks = <&ccu CLK_AHB_GPU>, <&ccu CLK_GPU>;
745 			resets = <&ccu RST_GPU>;
746 			assigned-clocks = <&ccu CLK_GPU>;
754 			clocks = <&ccu CLK_AHB_HSTIMER>;
761 			clocks = <&ccu CLK_DE_FE>, <&ccu CLK_DE_FE>,
762 				 <&ccu CLK_DRAM_DE_FE>;
765 			resets = <&ccu RST_DE_FE>;
788 			clocks = <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
789 				 <&ccu CLK_DRAM_DE_BE>;
792 			resets = <&ccu RST_DE_BE>;